/* * Copyright (C) 2007 by egnite Software GmbH. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * For additional information see http://www.ethernut.de/ * */ /* * $Log$ * Revision 1.2 2008/08/11 06:59:11 haraldkipp * BSD types replaced by stdint types (feature request #1282721). * * Revision 1.1 2007/02/15 16:11:14 haraldkipp * Support for system controller interrupts added. * */ #include #include #ifndef NUT_IRQPRI_UART #define NUT_IRQPRI_UART 0 #endif static int UartIrqCtl(int cmd, void *param); IRQ_HANDLER sig_UART = { #ifdef NUT_PERFMON 0, /* Interrupt counter, ir_count. */ #endif NULL, /* Passed argument, ir_arg. */ NULL, /* Handler subroutine, ir_handler. */ UartIrqCtl /* Interrupt control, ir_ctl. */ }; /*! * \brief System interrupt entry. */ static void UartIrqEntry(void);// __attribute__ ((naked)); void UartIrqEntry(void) { #ifdef NUT_PERFMON sig_UART.ir_count++; #endif if (sig_UART.ir_handler) { /* Call debug unit interrupt handler. */ (sig_UART.ir_handler) (sig_UART.ir_arg); } } /*! * \brief Timer/Counter 0 interrupt control. * * \param cmd Control command. * - NUT_IRQCTL_INIT Initialize and disable interrupt. * - NUT_IRQCTL_STATUS Query interrupt status. * - NUT_IRQCTL_ENABLE Enable interrupt. * - NUT_IRQCTL_DISABLE Disable interrupt. * - NUT_IRQCTL_GETPRIO Query interrupt priority. * - NUT_IRQCTL_SETPRIO Set interrupt priority. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter. * \param param Pointer to optional parameter. * * \return 0 on success, -1 otherwise. */ static int UartIrqCtl(int cmd, void *param) { int rc = 0; unsigned int *ival = (unsigned int *)param; int_fast8_t enabled = inr(AT91C_NVIC_ABR) & _BV(AT91C_ID_DBGU); /* Disable interrupt. */ if (enabled) { NVIC_DisableIRQ(INT_UART); } switch(cmd) { case NUT_IRQCTL_INIT: Cortex_RegisterInt(INT_UART,(void*)UartIrqEntry); NVIC_SetPriority(INT_UART,NUT_IRQPRI_UART); outr(AT91C_NVIC_ICPR,_BV(AT91C_ID_DBGU)); break; case NUT_IRQCTL_STATUS: if (enabled) { *ival |= 1; } else { *ival &= ~1; } break; case NUT_IRQCTL_ENABLE: enabled = 1; break; case NUT_IRQCTL_DISABLE: enabled = 0; break; case NUT_IRQCTL_GETPRIO: *ival = NVIC_GetPriority(INT_UART); break; case NUT_IRQCTL_SETPRIO: NVIC_SetPriority(INT_UART, *ival); break; #ifdef NUT_PERFMON case NUT_IRQCTL_GETCOUNT: *ival = (unsigned int)sig_UART.ir_count; sig_UART.ir_count = 0; break; #endif default: rc = -1; break; } /* Enable interrupt. */ if (enabled) { NVIC_EnableIRQ(INT_UART); } return rc; }