uartavr.h 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180
  1. #ifndef _DEV_UARTAVR_H_
  2. #define _DEV_UARTAVR_H_
  3. /*
  4. * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
  23. * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*
  35. * $Log: uartavr.h,v $
  36. * Revision 1.7 2005/10/07 21:53:15 hwmaier
  37. * Obsolete dcb_baudSelect removed
  38. *
  39. * Revision 1.6 2005/07/26 15:49:59 haraldkipp
  40. * Cygwin support added.
  41. *
  42. * Revision 1.5 2005/06/26 12:40:59 chaac
  43. * Added support for raw mode to AHDLC driver.
  44. *
  45. * Revision 1.4 2005/02/10 07:06:51 hwmaier
  46. * Changes to incorporate support for AT90CAN128 CPU
  47. *
  48. * Revision 1.3 2004/06/21 10:40:25 freckle
  49. * Added *nix emulation uart definitions to uartavr.h and usartavr.h to
  50. * allow compilation of apps without adding #include <dev/unix.devs.h>
  51. *
  52. * Revision 1.2 2004/03/16 16:48:28 haraldkipp
  53. * Added Jan Dubiec's H8/300 port.
  54. *
  55. * Revision 1.1.1.1 2003/05/09 14:41:09 haraldkipp
  56. * Initial using 3.2.1
  57. *
  58. * Revision 1.12 2003/05/06 18:44:45 harald
  59. * Handshakes added
  60. *
  61. * Revision 1.11 2003/03/31 14:53:24 harald
  62. * Prepare release 3.1
  63. *
  64. */
  65. #include <sys/device.h>
  66. #include <dev/uart.h>
  67. /*!
  68. * \file dev/uartavr.h
  69. * \brief AVR on-chip UART definitions.
  70. */
  71. /*!
  72. * \addtogroup xgUartAvr
  73. */
  74. /*@{*/
  75. #define UART_MF_RTSSENSE 0x00000001UL /*!< DCE input, low on port bit is +12V, which means ON. */
  76. #define UART_MF_CTSCONTROL 0x00000002UL /*!< DCE output. */
  77. #define UART_MF_DTRSENSE 0x00000004UL /*!< DCE input. */
  78. #define UART_MF_DSRCONTROL 0x00000008UL /*!< DCE output. */
  79. #define UART_MF_DCDCONTROL 0x00000010UL /*!< DCE output. */
  80. #define UART_MF_RTSCONTROL 0x00000020UL /*!< DTE output. */
  81. #define UART_MF_CTSSENSE 0x00000040UL /*!< DTE input. */
  82. #define UART_MF_DTRCONTROL 0x00000080UL /*!< DTE output. */
  83. #define UART_MF_DSRSENSE 0x00000100UL /*!< DTE input. */
  84. #define UART_MF_DCDSENSE 0x00000200UL /*!< DTE input. */
  85. #define UART_MF_SENSEMASK 0x0345 /*!< Handshake sense mask. */
  86. #define UART_MF_CONTROLMASK 0x00BC /*!< Handshake control mask. */
  87. #define UART_MF_XONXOFF 0x00000400UL /*!< Software handshake. */
  88. #define UART_MF_LOCALECHO 0x00010000UL /*!< Should be used in stream, not device. */
  89. #define UART_MF_COOKEDMODE 0x00020000UL /*!< Should be used in stream, not device. */
  90. #define UART_MF_NOBUFFER 0x00100000UL /*!< No buffering. */
  91. #define UART_MF_LINEBUFFER 0x00200000UL /*!< Line buffered. */
  92. #define UART_MF_BUFFERMASK 0x00300000UL /*!< Masks buffering mode flags. */
  93. #define UART_MF_RAWMODE 0x00400000UL /*!< Send data as raw, disables data encapsulation for device. */
  94. #define UART_SF_RTSOFF 0x00000001UL /*!< Set RTS line is off. */
  95. #define UART_SF_CTSOFF 0x00000002UL /*!< Set CTS line is off. */
  96. #define UART_SF_DTROFF 0x00000004UL /*!< Set DTR line is off. */
  97. #define UART_SF_DSROFF 0x00000008UL /*!< Set DSR line is off. */
  98. #define UART_SF_DCDOFF 0x00000010UL /*!< Set DCD line is off. */
  99. #define HDLC_SF_FLUSH 0x00001000UL /*!< Waiting for next HDLC flag. */
  100. #define HDLC_SF_ESCAPED 0x00002000UL /*!< Next character escaped. */
  101. #define UART_SF_TXDISABLED 0x00000040UL /*!< Transmitter disabled. */
  102. #define UART_SF_RXDISABLED 0x00000080UL /*!< Receiver disabled. */
  103. #define UART_HS_DCERTSCTS 0x00000003UL /*!< RTS/CTS DCE handshake. */
  104. #define UART_HS_DCEFULL 0x0000001FUL /*!< Full DCE handshake. */
  105. #define UART_HS_DTERTSCTS 0x00000060UL /*!< RTS/CTS DTE handshake. */
  106. #define UART_HS_DTEFULL 0x000003E0UL /*!< Full DTE handshake. */
  107. #define UART_HS_XONXOFF 0x00000400UL /*!< Software handshake. */
  108. /*!
  109. * UART device control block type.
  110. */
  111. typedef struct _UARTDCB UARTDCB;
  112. /*!
  113. * \struct _UARTDCB uartavr.h dev/uartavr.h
  114. * \brief UART device control block structure.
  115. */
  116. struct _UARTDCB {
  117. /*! \brief Read timeout.
  118. */
  119. u_long dcb_rtimeout;
  120. /*! \brief Write timeout.
  121. */
  122. u_long dcb_wtimeout;
  123. /*! \brief Queue of threads waiting for output buffer empty.
  124. *
  125. * Threads are added to this queue when calling UartAvrFlush().
  126. */
  127. HANDLE dcb_tx_rdy;
  128. /*! \brief Queue of threads waiting for a character in the input buffer.
  129. *
  130. * Threads are added to this queue when calling UartAvrInput().
  131. */
  132. HANDLE dcb_rx_rdy;
  133. /*! \brief Mode flags.
  134. */
  135. u_long dcb_modeflags;
  136. };
  137. /*@}*/
  138. /*
  139. * Available devices.
  140. */
  141. extern NUTDEVICE devUart0;
  142. #ifdef __AVR_ENHANCED__
  143. extern NUTDEVICE devUart1;
  144. #endif
  145. #if defined(__linux__) || defined(__APPLE__) || defined(__CYGWIN__)
  146. extern NUTDEVICE devUart0;
  147. extern NUTDEVICE devUart1;
  148. #endif
  149. #endif