at91_dbgu.c 5.2 KB

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  1. /*
  2. * Copyright (C) 2001-2006 by egnite Software GmbH
  3. * Copyright (C) 2010-2011 by egnite GmbH
  4. *
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. *
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions and the following disclaimer.
  13. * 2. Redistributions in binary form must reproduce the above copyright
  14. * notice, this list of conditions and the following disclaimer in the
  15. * documentation and/or other materials provided with the distribution.
  16. * 3. Neither the name of the copyright holders nor the names of
  17. * contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  23. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  24. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  25. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  26. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  27. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  28. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  30. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31. * SUCH DAMAGE.
  32. *
  33. * For additional information see http://www.ethernut.de/
  34. */
  35. /*!
  36. * \file arch/arm/dev/at91_dbgu.c
  37. * \brief AT91 debug output device using DBGU.
  38. *
  39. * \verbatim
  40. * $Id$
  41. * \endverbatim
  42. */
  43. #include <cfg/uart.h>
  44. #include <arch/arm/atmel/debug_at91.h>
  45. #if defined(DBGU_BASE)
  46. /*!
  47. * \addtogroup xgDevDebugAt91
  48. */
  49. /*@{*/
  50. #ifndef NUT_DEV_DEBUG_SPEED
  51. #ifdef UARTD_INIT_BAUDRATE
  52. #define NUT_DEV_DEBUG_SPEED UARTD_INIT_BAUDRATE
  53. #else
  54. #define NUT_DEV_DEBUG_SPEED 115200
  55. #endif
  56. #endif
  57. #ifdef NUT_DEV_DEBUG_READ
  58. #define NUT_DEV_DEBUG_ENA (US_RXEN | US_TXEN)
  59. #if defined (PA9_DRXD_A) && defined (PA10_DTXD_A)
  60. #define NUT_DEV_DEBUG_PINS (_BV(PA9_DRXD_A) | _BV(PA10_DTXD_A))
  61. #elif defined (PA27_DRXD_A) && defined (PA28_DTXD_A)
  62. #define NUT_DEV_DEBUG_PINS (_BV(PA27_DRXD_A) | _BV(PA28_DTXD_A))
  63. #elif defined (PB14_DRXD_A) && defined (PB15_DTXD_A)
  64. #define NUT_DEV_DEBUG_PINS (_BV(PB14_DRXD_A) | _BV(PB15_DTXD_A))
  65. #define NUT_DEV_DEBUG_PDR PIOB_PDR
  66. #elif defined (PB12_DRXD_A) && defined (PB13_DTXD_A)
  67. #define NUT_DEV_DEBUG_PINS (_BV(PB12_DRXD_A) | _BV(PB13_DTXD_A))
  68. #define NUT_DEV_DEBUG_PDR PIOB_PDR
  69. #endif
  70. #else
  71. #define NUT_DEV_DEBUG_ENA US_TXEN
  72. #if defined (PA10_DTXD_A)
  73. #define NUT_DEV_DEBUG_PINS _BV(PA10_DTXD_A)
  74. #elif defined (PA28_DTXD_A)
  75. #define NUT_DEV_DEBUG_PINS _BV(PA28_DTXD_A)
  76. #elif defined (PB15_DTXD_A)
  77. #define NUT_DEV_DEBUG_PINS _BV(PB15_DTXD_A)
  78. #define NUT_DEV_DEBUG_PDR PIOB_PDR
  79. #elif defined (PB12_DTXD_A)
  80. #define NUT_DEV_DEBUG_PINS _BV(PB12_DTXD_A)
  81. #define NUT_DEV_DEBUG_PDR PIOB_PDR
  82. #endif
  83. #endif
  84. #ifndef NUT_DEV_DEBUG_PDR
  85. #define NUT_DEV_DEBUG_PDR PIOA_PDR
  86. #endif
  87. /*!
  88. * \brief Initialize debug device 2.
  89. *
  90. * \return Always 0.
  91. */
  92. static int DebugInit(NUTDEVICE * dev)
  93. {
  94. #if NUT_DEV_DEBUG_PINS
  95. /* Disable GPIO on UART tx/rx pins. */
  96. outr(NUT_DEV_DEBUG_PDR, NUT_DEV_DEBUG_PINS);
  97. #endif
  98. /* Reset UART. */
  99. outr(DBGU_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
  100. /* Disable all UART interrupts. */
  101. outr(DBGU_IDR, 0xFFFFFFFF);
  102. #if NUT_DEV_DEBUG_SPEED
  103. /* Set UART baud rate generator register. */
  104. outr(DBGU_BRGR, At91BaudRateDiv(NUT_DEV_DEBUG_SPEED));
  105. #endif
  106. /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
  107. outr(DBGU_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
  108. /* Enable UART transmitter and optionally the receiver. */
  109. outr(DBGU_CR, NUT_DEV_DEBUG_ENA);
  110. return 0;
  111. }
  112. static NUTFILE dbgfile;
  113. /*!
  114. * \brief Debug device information structure.
  115. */
  116. NUTDEVICE devDebug = {
  117. 0, /*!< Pointer to next device, dev_next. */
  118. {'d', 'b', 'g', 'u', 0, 0, 0, 0, 0}
  119. , /*!< Unique device name, dev_name. */
  120. 0, /*!< Type of device, dev_type. */
  121. DBGU_BASE, /*!< Base address, dev_base. */
  122. 0, /*!< First interrupt number, dev_irq. */
  123. 0, /*!< Interface control block, dev_icb. */
  124. &dbgfile, /*!< Driver control block, dev_dcb. */
  125. DebugInit, /*!< Driver initialization routine, dev_init. */
  126. At91DevDebugIOCtl, /*!< Driver specific control function, dev_ioctl. */
  127. #ifdef NUT_DEV_DEBUG_READ
  128. At91DevDebugRead, /*!< dev_read. */
  129. #else
  130. 0,
  131. #endif
  132. At91DevDebugWrite, /*!< dev_write. */
  133. At91DevDebugOpen, /*!< dev_opem. */
  134. At91DevDebugClose, /*!< dev_close. */
  135. #ifdef NUT_DEV_DEBUG_READ
  136. At91DevDebugSize,
  137. #else
  138. 0, /*!< dev_size. */
  139. #endif
  140. 0, /*!< dev_select, optional, not yet implemented */
  141. };
  142. #endif /* DBGU_BASE */
  143. /*@}*/