ih_at91adc.c 5.6 KB

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  1. /*
  2. * Copyright (C) 2001-2005 by EmbeddedIT,
  3. * Ole Reinhardt <ole.reinhardt@embedded-it.de> All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the distribution.
  14. * 3. Neither the name of the copyright holders nor the names of
  15. * contributors may be used to endorse or promote products derived
  16. * from this software without specific prior written permission.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY EMBEDDED IT AND CONTRIBUTORS
  19. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  21. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EMBEDDED IT
  22. * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  23. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  24. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  25. * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  27. * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  28. * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*
  34. * $Log$
  35. * Revision 1.3 2008/08/11 06:59:09 haraldkipp
  36. * BSD types replaced by stdint types (feature request #1282721).
  37. *
  38. * Revision 1.2 2008/07/26 09:43:01 haraldkipp
  39. * Added support for retrieving and setting the interrupt mode.
  40. *
  41. * Revision 1.1 2007/12/09 21:36:05 olereinhardt
  42. * Initial checkin of adc irq handler
  43. *
  44. */
  45. #include <arch/arm.h>
  46. #include <dev/irqreg.h>
  47. #if defined(ADC_ID)
  48. #ifndef NUT_IRQPRI_ADC
  49. #define NUT_IRQPRI_ADC 4
  50. #endif
  51. static int AdcIrqCtl(int cmd, void *param);
  52. IRQ_HANDLER sig_ADC = {
  53. #ifdef NUT_PERFMON
  54. 0, /* Interrupt counter, ir_count. */
  55. #endif
  56. NULL, /* Passed argument, ir_arg. */
  57. NULL, /* Handler subroutine, ir_handler. */
  58. AdcIrqCtl /* Interrupt control, ir_ctl. */
  59. };
  60. /*!
  61. * \brief ADC interrupt entry.
  62. */
  63. static void AdcIrqEntry(void) NUT_NAKED_FUNC;
  64. void AdcIrqEntry(void)
  65. {
  66. IRQ_ENTRY();
  67. #ifdef NUT_PERFMON
  68. sig_ADC.ir_count++;
  69. #endif
  70. if (sig_ADC.ir_handler) {
  71. (sig_ADC.ir_handler) (sig_ADC.ir_arg);
  72. }
  73. IRQ_EXIT();
  74. }
  75. /*!
  76. * \brief ADC interrupt control.
  77. *
  78. * \param cmd Control command.
  79. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  80. * - NUT_IRQCTL_STATUS Query interrupt status.
  81. * - NUT_IRQCTL_ENABLE Enable interrupt.
  82. * - NUT_IRQCTL_DISABLE Disable interrupt.
  83. * - NUT_IRQCTL_GETMODE Query interrupt mode.
  84. * - NUT_IRQCTL_SETMODE Set interrupt mode (NUT_IRQMODE_LEVEL or NUT_IRQMODE_EDGE).
  85. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  86. * - NUT_IRQCTL_SETPRIO Set interrupt priority.
  87. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  88. * \param param Pointer to optional parameter.
  89. *
  90. * \return 0 on success, -1 otherwise.
  91. */
  92. static int AdcIrqCtl(int cmd, void *param)
  93. {
  94. int rc = 0;
  95. unsigned int *ival = (unsigned int *)param;
  96. int_fast8_t enabled = inr(AIC_IMR) & _BV(ADC_ID);
  97. /* Disable interrupt. */
  98. if (enabled) {
  99. outr(AIC_IDCR, _BV(ADC_ID));
  100. }
  101. switch(cmd) {
  102. case NUT_IRQCTL_INIT:
  103. /* Set the vector. */
  104. outr(AIC_SVR(ADC_ID), (unsigned int)AdcIrqEntry);
  105. /* Initialize to edge triggered with defined priority. */
  106. outr(AIC_SMR(ADC_ID), AIC_SRCTYPE_INT_EDGE_TRIGGERED | NUT_IRQPRI_ADC);
  107. /* Clear interrupt */
  108. outr(AIC_ICCR, _BV(ADC_ID));
  109. break;
  110. case NUT_IRQCTL_STATUS:
  111. if (enabled) {
  112. *ival |= 1;
  113. }
  114. else {
  115. *ival &= ~1;
  116. }
  117. break;
  118. case NUT_IRQCTL_ENABLE:
  119. enabled = 1;
  120. break;
  121. case NUT_IRQCTL_DISABLE:
  122. enabled = 0;
  123. break;
  124. case NUT_IRQCTL_GETMODE:
  125. {
  126. unsigned int val = inr(AIC_SMR(ADC_ID)) & AIC_SRCTYPE;
  127. if (val == AIC_SRCTYPE_INT_LEVEL_SENSITIVE || val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
  128. *ival = NUT_IRQMODE_LEVEL;
  129. } else {
  130. *ival = NUT_IRQMODE_EDGE;
  131. }
  132. }
  133. break;
  134. case NUT_IRQCTL_SETMODE:
  135. if (*ival == NUT_IRQMODE_LEVEL) {
  136. outr(AIC_SMR(ADC_ID), (inr(AIC_SMR(ADC_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_INT_LEVEL_SENSITIVE);
  137. } else if (*ival == NUT_IRQMODE_EDGE) {
  138. outr(AIC_SMR(ADC_ID), (inr(AIC_SMR(ADC_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_INT_EDGE_TRIGGERED);
  139. } else {
  140. rc = -1;
  141. }
  142. break;
  143. case NUT_IRQCTL_GETPRIO:
  144. *ival = inr(AIC_SMR(ADC_ID)) & AIC_PRIOR;
  145. break;
  146. case NUT_IRQCTL_SETPRIO:
  147. outr(AIC_SMR(ADC_ID), (inr(AIC_SMR(ADC_ID)) & ~AIC_PRIOR) | *ival);
  148. break;
  149. #ifdef NUT_PERFMON
  150. case NUT_IRQCTL_GETCOUNT:
  151. *ival = (unsigned int)sig_ADC.ir_count;
  152. sig_ADC.ir_count = 0;
  153. break;
  154. #endif
  155. default:
  156. rc = -1;
  157. break;
  158. }
  159. /* Enable interrupt. */
  160. if (enabled) {
  161. outr(AIC_IECR, _BV(ADC_ID));
  162. }
  163. return rc;
  164. }
  165. #endif /* ADC_ID */