ih_at91irq0.c 6.2 KB

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  1. /*
  2. * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*
  34. * $Log$
  35. * Revision 1.6 2009/01/30 08:55:23 haraldkipp
  36. * Enable IRQ clocks.
  37. *
  38. * Revision 1.5 2008/08/11 06:59:09 haraldkipp
  39. * BSD types replaced by stdint types (feature request #1282721).
  40. *
  41. * Revision 1.4 2006/06/28 17:10:15 haraldkipp
  42. * Include more general header file for ARM.
  43. *
  44. * Revision 1.3 2006/04/07 12:20:55 haraldkipp
  45. * Fixed wrong setting of high level sense.
  46. *
  47. * Revision 1.2 2006/01/05 16:44:53 haraldkipp
  48. * Edge and level trigger modes now configurable.
  49. *
  50. * Revision 1.1 2005/10/24 08:56:09 haraldkipp
  51. * First check in.
  52. *
  53. */
  54. #include <arch/arm.h>
  55. #include <dev/irqreg.h>
  56. #ifndef NUT_IRQPRI_IRQ0
  57. #define NUT_IRQPRI_IRQ0 4
  58. #endif
  59. static int Interrupt0Ctl(int cmd, void *param);
  60. IRQ_HANDLER sig_INTERRUPT0 = {
  61. #ifdef NUT_PERFMON
  62. 0, /* Interrupt counter, ir_count. */
  63. #endif
  64. NULL, /* Passed argument, ir_arg. */
  65. NULL, /* Handler subroutine, ir_handler. */
  66. Interrupt0Ctl /* Interrupt control, ir_ctl. */
  67. };
  68. /*!
  69. * \brief External interrupt 0 entry.
  70. */
  71. static void Interrupt0Entry(void) NUT_NAKED_FUNC;
  72. void Interrupt0Entry(void)
  73. {
  74. IRQ_ENTRY();
  75. #ifdef NUT_PERFMON
  76. sig_INTERRUPT0.ir_count++;
  77. #endif
  78. if (sig_INTERRUPT0.ir_handler) {
  79. (sig_INTERRUPT0.ir_handler) (sig_INTERRUPT0.ir_arg);
  80. }
  81. IRQ_EXIT();
  82. }
  83. /*!
  84. * \brief External interrupt 0 control.
  85. *
  86. * \param cmd Control command.
  87. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  88. * - NUT_IRQCTL_STATUS Query interrupt status.
  89. * - NUT_IRQCTL_ENABLE Enable interrupt.
  90. * - NUT_IRQCTL_DISABLE Disable interrupt.
  91. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  92. * - NUT_IRQCTL_SETPRIO Set interrupt priority.
  93. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  94. * \param param Pointer to optional parameter.
  95. *
  96. * \return 0 on success, -1 otherwise.
  97. */
  98. static int Interrupt0Ctl(int cmd, void *param)
  99. {
  100. int rc = 0;
  101. unsigned int *ival = (unsigned int *)param;
  102. int_fast8_t enabled = inr(AIC_IMR) & _BV(IRQ0_ID);
  103. /* Disable interrupt. */
  104. if (enabled) {
  105. outr(AIC_IDCR, _BV(IRQ0_ID));
  106. }
  107. switch(cmd) {
  108. case NUT_IRQCTL_INIT:
  109. /* Set the vector. */
  110. outr(AIC_SVR(IRQ0_ID), (unsigned int)Interrupt0Entry);
  111. /* Initialize to edge triggered with defined priority. */
  112. outr(AIC_SMR(IRQ0_ID), AIC_SRCTYPE_EXT_NEGATIVE_EDGE | NUT_IRQPRI_IRQ0);
  113. /* Clear interrupt */
  114. outr(AIC_ICCR, _BV(IRQ0_ID));
  115. break;
  116. case NUT_IRQCTL_STATUS:
  117. if (enabled) {
  118. *ival |= 1;
  119. }
  120. else {
  121. *ival &= ~1;
  122. }
  123. break;
  124. case NUT_IRQCTL_ENABLE:
  125. enabled = 1;
  126. break;
  127. case NUT_IRQCTL_DISABLE:
  128. enabled = 0;
  129. break;
  130. case NUT_IRQCTL_GETMODE:
  131. {
  132. unsigned int val = inr(AIC_SMR(IRQ0_ID)) & AIC_SRCTYPE;
  133. if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
  134. *ival = NUT_IRQMODE_LOWLEVEL;
  135. } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
  136. *ival = NUT_IRQMODE_HIGHLEVEL;
  137. } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
  138. *ival = NUT_IRQMODE_RISINGEDGE;
  139. } else {
  140. *ival = NUT_IRQMODE_FALLINGEDGE;
  141. }
  142. }
  143. break;
  144. case NUT_IRQCTL_SETMODE:
  145. if (*ival == NUT_IRQMODE_LOWLEVEL) {
  146. outr(AIC_SMR(IRQ0_ID), (inr(AIC_SMR(IRQ0_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
  147. } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
  148. outr(AIC_SMR(IRQ0_ID), (inr(AIC_SMR(IRQ0_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
  149. } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
  150. outr(AIC_SMR(IRQ0_ID), (inr(AIC_SMR(IRQ0_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
  151. } else if (*ival == NUT_IRQMODE_RISINGEDGE) {
  152. outr(AIC_SMR(IRQ0_ID), (inr(AIC_SMR(IRQ0_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
  153. } else {
  154. rc = -1;
  155. }
  156. break;
  157. case NUT_IRQCTL_GETPRIO:
  158. *ival = inr(AIC_SMR(IRQ0_ID)) & AIC_PRIOR;
  159. break;
  160. case NUT_IRQCTL_SETPRIO:
  161. outr(AIC_SMR(IRQ0_ID), (inr(AIC_SMR(IRQ0_ID)) & ~AIC_PRIOR) | *ival);
  162. break;
  163. #ifdef NUT_PERFMON
  164. case NUT_IRQCTL_GETCOUNT:
  165. *ival = (unsigned int)sig_INTERRUPT0.ir_count;
  166. sig_INTERRUPT0.ir_count = 0;
  167. break;
  168. #endif
  169. default:
  170. rc = -1;
  171. break;
  172. }
  173. /* Enable interrupt. */
  174. if (enabled) {
  175. outr(AIC_IECR, _BV(IRQ0_ID));
  176. #if defined(PMC_PCER)
  177. outr(PMC_PCER, _BV(IRQ0_ID));
  178. #endif
  179. }
  180. return rc;
  181. }