ih_at91irq1.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*
  34. * $Log$
  35. * Revision 1.5 2009/01/30 08:55:23 haraldkipp
  36. * Enable IRQ clocks.
  37. *
  38. * Revision 1.4 2008/08/11 06:59:10 haraldkipp
  39. * BSD types replaced by stdint types (feature request #1282721).
  40. *
  41. * Revision 1.3 2006/06/28 17:10:15 haraldkipp
  42. * Include more general header file for ARM.
  43. *
  44. * Revision 1.2 2006/04/07 12:21:43 haraldkipp
  45. * Added missing IRQ sense settings.
  46. *
  47. * Revision 1.1 2005/10/24 08:56:09 haraldkipp
  48. * First check in.
  49. *
  50. */
  51. #include <arch/arm.h>
  52. #include <dev/irqreg.h>
  53. #ifndef NUT_IRQPRI_IRQ1
  54. #define NUT_IRQPRI_IRQ1 4
  55. #endif
  56. static int Interrupt1Ctl(int cmd, void *param);
  57. IRQ_HANDLER sig_INTERRUPT1 = {
  58. #ifdef NUT_PERFMON
  59. 0, /* Interrupt counter, ir_count. */
  60. #endif
  61. NULL, /* Passed argument, ir_arg. */
  62. NULL, /* Handler subroutine, ir_handler. */
  63. Interrupt1Ctl /* Interrupt control, ir_ctl. */
  64. };
  65. /*!
  66. * \brief External interrupt 1 entry.
  67. */
  68. static void Interrupt1Entry(void) NUT_NAKED_FUNC;
  69. void Interrupt1Entry(void)
  70. {
  71. IRQ_ENTRY();
  72. #ifdef NUT_PERFMON
  73. sig_INTERRUPT1.ir_count++;
  74. #endif
  75. if (sig_INTERRUPT1.ir_handler) {
  76. (sig_INTERRUPT1.ir_handler) (sig_INTERRUPT1.ir_arg);
  77. }
  78. IRQ_EXIT();
  79. }
  80. /*!
  81. * \brief External interrupt 1 control.
  82. *
  83. * \param cmd Control command.
  84. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  85. * - NUT_IRQCTL_STATUS Query interrupt status.
  86. * - NUT_IRQCTL_ENABLE Enable interrupt.
  87. * - NUT_IRQCTL_DISABLE Disable interrupt.
  88. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  89. * - NUT_IRQCTL_SETPRIO Set interrupt priority.
  90. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  91. * \param param Pointer to optional parameter.
  92. *
  93. * \return 0 on success, -1 otherwise.
  94. */
  95. static int Interrupt1Ctl(int cmd, void *param)
  96. {
  97. int rc = 0;
  98. unsigned int *ival = (unsigned int *)param;
  99. int_fast8_t enabled = inr(AIC_IMR) & _BV(IRQ1_ID);
  100. /* Disable interrupt. */
  101. if (enabled) {
  102. outr(AIC_IDCR, _BV(IRQ1_ID));
  103. }
  104. switch(cmd) {
  105. case NUT_IRQCTL_INIT:
  106. /* Set the vector. */
  107. outr(AIC_SVR(IRQ1_ID), (unsigned int)Interrupt1Entry);
  108. /* Initialize to edge triggered with defined priority. */
  109. outr(AIC_SMR(IRQ1_ID), AIC_SRCTYPE_EXT_HIGH_LEVEL | NUT_IRQPRI_IRQ1);
  110. /* Clear interrupt */
  111. outr(AIC_ICCR, _BV(IRQ1_ID));
  112. break;
  113. case NUT_IRQCTL_STATUS:
  114. if (enabled) {
  115. *ival |= 1;
  116. }
  117. else {
  118. *ival &= ~1;
  119. }
  120. break;
  121. case NUT_IRQCTL_ENABLE:
  122. enabled = 1;
  123. break;
  124. case NUT_IRQCTL_DISABLE:
  125. enabled = 0;
  126. break;
  127. case NUT_IRQCTL_GETMODE:
  128. {
  129. unsigned int val = inr(AIC_SMR(IRQ1_ID)) & AIC_SRCTYPE;
  130. if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
  131. *ival = NUT_IRQMODE_LOWLEVEL;
  132. } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
  133. *ival = NUT_IRQMODE_HIGHLEVEL;
  134. } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
  135. *ival = NUT_IRQMODE_RISINGEDGE;
  136. } else {
  137. *ival = NUT_IRQMODE_FALLINGEDGE;
  138. }
  139. }
  140. break;
  141. case NUT_IRQCTL_SETMODE:
  142. if (*ival == NUT_IRQMODE_LOWLEVEL) {
  143. outr(AIC_SMR(IRQ1_ID), (inr(AIC_SMR(IRQ1_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
  144. } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
  145. outr(AIC_SMR(IRQ1_ID), (inr(AIC_SMR(IRQ1_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
  146. } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
  147. outr(AIC_SMR(IRQ1_ID), (inr(AIC_SMR(IRQ1_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
  148. } else if (*ival == NUT_IRQMODE_RISINGEDGE) {
  149. outr(AIC_SMR(IRQ1_ID), (inr(AIC_SMR(IRQ1_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
  150. } else {
  151. rc = -1;
  152. }
  153. break;
  154. case NUT_IRQCTL_GETPRIO:
  155. *ival = inr(AIC_SMR(IRQ1_ID)) & AIC_PRIOR;
  156. break;
  157. case NUT_IRQCTL_SETPRIO:
  158. outr(AIC_SMR(IRQ1_ID), (inr(AIC_SMR(IRQ1_ID)) & ~AIC_PRIOR) | *ival);
  159. break;
  160. #ifdef NUT_PERFMON
  161. case NUT_IRQCTL_GETCOUNT:
  162. *ival = (unsigned int)sig_INTERRUPT1.ir_count;
  163. sig_INTERRUPT1.ir_count = 0;
  164. break;
  165. #endif
  166. default:
  167. rc = -1;
  168. break;
  169. }
  170. /* Enable interrupt. */
  171. if (enabled) {
  172. outr(AIC_IECR, _BV(IRQ1_ID));
  173. #if defined(PMC_PCER)
  174. outr(PMC_PCER, _BV(IRQ1_ID));
  175. #endif
  176. }
  177. return rc;
  178. }