ostimer_s3c4510b.c 6.7 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*
  34. * $Log$
  35. * Revision 1.7 2008/08/22 09:25:34 haraldkipp
  36. * Clock value caching and new functions NutArchClockGet, NutClockGet and
  37. * NutClockSet added.
  38. *
  39. * Revision 1.6 2008/08/11 06:59:13 haraldkipp
  40. * BSD types replaced by stdint types (feature request #1282721).
  41. *
  42. * Revision 1.5 2008/07/08 08:25:04 haraldkipp
  43. * NutDelay is no more architecture specific.
  44. * Number of loops per millisecond is configurable or will be automatically
  45. * determined.
  46. * A new function NutMicroDelay provides shorter delays.
  47. *
  48. * Revision 1.4 2007/08/17 10:44:37 haraldkipp
  49. * Timer enable/disable macro replaces previous global interrupt
  50. * enable/disable or function calling.
  51. *
  52. * Revision 1.3 2006/10/08 16:48:07 haraldkipp
  53. * Documentation fixed
  54. *
  55. * Revision 1.2 2005/10/24 08:58:48 haraldkipp
  56. * Header file moved.
  57. *
  58. * Revision 1.1 2005/07/26 18:02:26 haraldkipp
  59. * Moved from dev.
  60. *
  61. * Revision 1.2 2005/07/20 09:17:26 haraldkipp
  62. * Default NUT_CPU_FREQ and NUT_TICK_FREQ added.
  63. * NutTimerIntr() removed, because we can use the hardware independent code.
  64. *
  65. * Revision 1.1 2005/05/27 17:16:40 drsung
  66. * Moved the file.
  67. *
  68. * Revision 1.5 2005/04/05 17:50:46 haraldkipp
  69. * Use register names in gba.h.
  70. *
  71. * Revision 1.4 2004/11/08 19:16:37 haraldkipp
  72. * Hacked in Gameboy timer support
  73. *
  74. * Revision 1.3 2004/10/03 18:42:21 haraldkipp
  75. * No GBA support yet, but let the compiler run through
  76. *
  77. * Revision 1.2 2004/09/08 10:19:39 haraldkipp
  78. * Running on AT91 and S3C, thanks to James Tyou
  79. *
  80. */
  81. #include <cfg/arch.h>
  82. #if defined(MCU_AT91R40008)
  83. #include <arch/arm/at91.h>
  84. #elif defined(MCU_S3C4510B)
  85. #include <arch/arm.h>
  86. #include <dev/s3c4510b_hw.h>
  87. #include <dev/s3c4510b_irqs.h>
  88. #elif defined(MCU_GBA)
  89. #include <arch/gba.h>
  90. #include <dev/irqreg.h>
  91. #endif
  92. #ifndef NUT_CPU_FREQ
  93. #define NUT_CPU_FREQ 1000000UL
  94. #endif
  95. #ifndef NUT_TICK_FREQ
  96. #define NUT_TICK_FREQ 1000UL
  97. #endif
  98. #if defined(MCU_AT91R40008)
  99. static int dummy;
  100. #endif
  101. static void (*os_handler) (void *);
  102. /*!
  103. * \brief Timer 0 interrupt entry.
  104. */
  105. #if defined(MCU_AT91R40008)
  106. void Timer0Entry(void) NUT_NAKED_FUNC;
  107. void Timer0Entry(void)
  108. {
  109. IRQ_ENTRY();
  110. dummy = inr(TC0_SR);
  111. os_handler(0);
  112. IRQ_EXIT();
  113. }
  114. #elif defined(MCU_GBA)
  115. void Timer3Entry(void *arg)
  116. {
  117. outw(REG_IF, INT_TMR3);
  118. os_handler(0);
  119. }
  120. #endif
  121. /*!
  122. * \brief Initialize system timer.
  123. *
  124. * This function is automatically called by Nut/OS
  125. * during system initialization.
  126. *
  127. * Nut/OS uses on-chip timer 0 for its timer services.
  128. * Applications should not modify any registers of this
  129. * timer, but make use of the Nut/OS timer API. Timer 1
  130. * and timer 2 are available to applications.
  131. */
  132. void NutRegisterTimer(void (*handler) (void *))
  133. {
  134. os_handler = handler;
  135. #if defined(MCU_AT91R40008)
  136. /* Disable the Clock Counter */
  137. outr(TC0_CCR, TC_CLKDIS);
  138. /* Disable all interrupts */
  139. outr(TC0_IDR, 0xFFFFFFFF);
  140. /* Clear the status register. */
  141. dummy = inr(TC0_SR);
  142. /* Select divider and compare trigger */
  143. outr(TC0_CMR, TC_CLKS_MCK32 | TC_CPCTRG);
  144. /* Enable the Clock counter */
  145. outr(TC0_CCR, TC_CLKEN);
  146. /* Validate the RC compare interrupt */
  147. outr(TC0_IER, TC_CPCS);
  148. /* Disable timer 0 interrupts. */
  149. outr(AIC_IDCR, _BV(TC0_ID));
  150. /* Set the TC0 IRQ handler address */
  151. outr(AIC_SVR(4), (unsigned int)Timer0Entry);
  152. /* Set the trigg and priority for timer 0 interrupt */
  153. /* Level 7 is highest, level 0 lowest. */
  154. outr(AIC_SMR(4), (AIC_SRCTYPE_INT_LEVEL_SENSITIVE | 0x4));
  155. /* Clear timer 0 interrupt */
  156. outr(AIC_ICCR, _BV(TC0_ID));
  157. /* Enable timer 0 interrupts */
  158. outr(AIC_IECR, _BV(TC0_ID));
  159. /* Set compare value for 1 ms. */
  160. outr(TC0_RC, 0x80F);
  161. /* Software trigger starts the clock. */
  162. outr(TC0_CCR, TC_SWTRG);
  163. #elif defined(MCU_S3C4510B)
  164. INT_DISABLE(IRQ_TIMER);
  165. CSR_WRITE(TCNT0, 0);
  166. CSR_WRITE(TDATA0, CLOCK_TICK_RATE);
  167. CSR_WRITE(TMOD, TMOD_TIMER0_VAL);
  168. CLEAR_PEND_INT(IRQ_TIMER);
  169. NutRegisterIrqHandler(
  170. &InterruptHandlers[IRQ_TIMER], handler, 0);
  171. INT_ENABLE(IRQ_TIMER);
  172. #elif defined(MCU_GBA)
  173. /* Disable master interrupt. */
  174. outw(REG_IME, 0);
  175. /* Set global interrupt vector. */
  176. NutRegisterIrqHandler(&sig_TMR3, Timer3Entry, 0);
  177. /* Enable timer and timer interrupts. */
  178. outdw(REG_TMR3CNT, TMR_IRQ_ENA | TMR_ENA | 48756);
  179. /* Enable timer 3 interrupts. */
  180. outw(REG_IE, inw(REG_IE) | INT_TMR3);
  181. /* Enable master interrupt. */
  182. outw(REG_IME, 1);
  183. #else
  184. #warning "MCU not defined"
  185. #endif
  186. }
  187. /*!
  188. * \brief Return the CPU clock in Hertz.
  189. *
  190. * \return CPU clock frequency in Hertz.
  191. */
  192. uint32_t NutArchClockGet(int idx)
  193. {
  194. return NUT_CPU_FREQ;
  195. }
  196. /*!
  197. * \brief Return the number of system ticks per second.
  198. *
  199. * \return System tick frequency in Hertz.
  200. */
  201. uint32_t NutGetTickClock(void)
  202. {
  203. return NUT_TICK_FREQ;
  204. }
  205. /*!
  206. * \brief Calculate system ticks for a given number of milliseconds.
  207. */
  208. uint32_t NutTimerMillisToTicks(uint32_t ms)
  209. {
  210. #if (NUT_TICK_FREQ % 1000)
  211. if (ms >= 0x3E8000UL)
  212. return (ms / 1000UL) * NUT_TICK_FREQ;
  213. return (ms * NUT_TICK_FREQ + 999UL) / 1000UL;
  214. #else
  215. return ms * (NUT_TICK_FREQ / 1000UL);
  216. #endif
  217. }