ih_int1.c 5.6 KB

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  1. /*
  2. * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*!
  34. * \file arch/avr/dev/ih_int1.c
  35. * \brief AVR external interrupt 1.
  36. *
  37. * \verbatim
  38. * $Id: ih_int1.c 4706 2012-10-06 17:42:01Z haraldkipp $
  39. * \endverbatim
  40. */
  41. #include <dev/irqreg.h>
  42. /*!
  43. * \addtogroup xgIrqReg
  44. */
  45. /*@{*/
  46. static int AvrInterrupt1Ctl(int cmd, void *param);
  47. IRQ_HANDLER sig_INTERRUPT1 = {
  48. #ifdef NUT_PERFMON
  49. 0, /* Interrupt counter, ir_count. */
  50. #endif
  51. NULL, /* Passed argument, ir_arg. */
  52. NULL, /* Handler subroutine, ir_handler. */
  53. AvrInterrupt1Ctl /* Interrupt control, ir_ctl. */
  54. };
  55. /*!
  56. * \brief External interrupt 1 control.
  57. *
  58. * \param cmd Control command.
  59. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  60. * - NUT_IRQCTL_STATUS Query interrupt status.
  61. * - NUT_IRQCTL_ENABLE Enable interrupt.
  62. * - NUT_IRQCTL_DISABLE Disable interrupt.
  63. * - NUT_IRQCTL_GETMODE Query interrupt mode.
  64. * - NUT_IRQCTL_SETMODE Set interrupt mode.
  65. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  66. * - NUT_IRQCTL_SETPRIO Set interrupt priority.
  67. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  68. * \param param Pointer to optional parameter.
  69. *
  70. * \return 0 on success, -1 otherwise.
  71. */
  72. static int AvrInterrupt1Ctl(int cmd, void *param)
  73. {
  74. int rc = 0;
  75. unsigned int *ival = (unsigned int *) param;
  76. int_fast8_t enabled = bit_is_set(EIMSK, INT1);
  77. /* Disable interrupt. */
  78. cbi(EIMSK, INT1);
  79. switch (cmd) {
  80. case NUT_IRQCTL_INIT:
  81. #ifdef __AVR_ENHANCED__
  82. /* Initialize to low level triggered. */
  83. cbi(EICRA, ISC10);
  84. cbi(EICRA, ISC11);
  85. #endif
  86. case NUT_IRQCTL_CLEAR:
  87. #ifdef __AVR_ENHANCED__
  88. /* Clear any pending interrupt. */
  89. outb(EIFR, _BV(INTF1));
  90. #endif /* __AVR_ENHANCED__ */
  91. break;
  92. case NUT_IRQCTL_STATUS:
  93. #ifdef __AVR_ENHANCED__
  94. if (bit_is_set(EIFR, INTF1)) {
  95. *ival = 1;
  96. } else {
  97. *ival = 0;
  98. }
  99. #else /* !__AVR_ENHANCED__ */
  100. *ival = 0;
  101. #endif /* __AVR_ENHANCED__ */
  102. if (enabled) {
  103. *ival |= 0x80;
  104. }
  105. break;
  106. case NUT_IRQCTL_ENABLE:
  107. enabled = 1;
  108. break;
  109. case NUT_IRQCTL_DISABLE:
  110. enabled = 0;
  111. break;
  112. case NUT_IRQCTL_GETMODE:
  113. #ifdef __AVR_ENHANCED__
  114. {
  115. uint8_t bval = inb(EICRA) & (_BV(ISC11) | _BV(ISC10));
  116. if (bval == _BV(ISC11)) {
  117. *ival = NUT_IRQMODE_FALLINGEDGE;
  118. } else if (bval == _BV(ISC11 | ISC10)) {
  119. *ival = NUT_IRQMODE_RISINGEDGE;
  120. } else {
  121. *ival = NUT_IRQMODE_LOWLEVEL;
  122. }
  123. }
  124. #else /* !__AVR_ENHANCED__ */
  125. *ival = NUT_IRQMODE_LOWLEVEL;
  126. #endif /* __AVR_ENHANCED__ */
  127. break;
  128. case NUT_IRQCTL_SETMODE:
  129. #ifdef __AVR_ENHANCED__
  130. if (*ival == NUT_IRQMODE_LOWLEVEL) {
  131. cbi(EICRA, ISC10);
  132. cbi(EICRA, ISC11);
  133. } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
  134. cbi(EICRA, ISC10);
  135. sbi(EICRA, ISC11);
  136. } else if (*ival == NUT_IRQMODE_RISINGEDGE) {
  137. sbi(EICRA, ISC10);
  138. sbi(EICRA, ISC11);
  139. } else {
  140. rc = -1;
  141. }
  142. #else /* !__AVR_ENHANCED__ */
  143. if (*ival != NUT_IRQMODE_LOWLEVEL) {
  144. rc = -1;
  145. }
  146. #endif /* __AVR_ENHANCED__ */
  147. break;
  148. case NUT_IRQCTL_GETPRIO:
  149. *ival = 1;
  150. break;
  151. #ifdef NUT_PERFMON
  152. case NUT_IRQCTL_GETCOUNT:
  153. *ival = (unsigned int) sig_INTERRUPT1.ir_count;
  154. sig_INTERRUPT1.ir_count = 0;
  155. break;
  156. #endif
  157. default:
  158. rc = -1;
  159. break;
  160. }
  161. /* Enable interrupt. */
  162. if (enabled) {
  163. sbi(EIMSK, INT1);
  164. }
  165. return rc;
  166. }
  167. /*! \fn INT1_vect(void)
  168. * \brief External interrupt 1 entry.
  169. */
  170. #ifdef __IMAGECRAFT__
  171. #pragma interrupt_handler INT1_vect:iv_INT1
  172. #endif
  173. NUTSIGNAL(INT1_vect, sig_INTERRUPT1)
  174. /*@}*/