ih_timer3_capt.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151
  1. /*
  2. * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*!
  34. * \file arch/avr/dev/ih_timer3_capt.c
  35. * \brief Timer/Counter 3 capture event interrupt.
  36. *
  37. * \verbatim
  38. * $Id: ih_timer3_capt.c 4706 2012-10-06 17:42:01Z haraldkipp $
  39. * \endverbatim
  40. */
  41. #include <dev/irqreg.h>
  42. #if defined(MCU_AT90CAN128) || defined(MCU_ATMEGA2560) || defined(MCU_ATMEGA2561) || defined(MCU_AT90USB1287)
  43. #define INT_MASK_REG TIMSK3
  44. #define INT_STATUS_REG TIFR3
  45. #define INT_ENABLE_BIT ICIE3
  46. #define INT_STATUS_BIT ICF3
  47. #define INT_PRIORITY 0
  48. #else
  49. #define INT_MASK_REG ETIMSK
  50. #define INT_STATUS_REG ETIFR
  51. #define INT_ENABLE_BIT TICIE3
  52. #define INT_STATUS_BIT ICF3
  53. #define INT_PRIORITY 0
  54. #endif
  55. /*!
  56. * \addtogroup xgIrqReg
  57. */
  58. /*@{*/
  59. #if defined(TIMER3_CAPT_vect) || defined(iv_TIMER3_CAPT)
  60. static int AvrTimer3InCaptIrqCtl(int cmd, void *param);
  61. IRQ_HANDLER sig_INPUT_CAPTURE3 = {
  62. #ifdef NUT_PERFMON
  63. 0, /* Interrupt counter, ir_count. */
  64. #endif
  65. NULL, /* Passed argument, ir_arg. */
  66. NULL, /* Handler subroutine, ir_handler. */
  67. AvrTimer3InCaptIrqCtl /* Interrupt control, ir_ctl. */
  68. };
  69. /*!
  70. * \brief External interrupt 0 control.
  71. *
  72. * \param cmd Control command.
  73. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  74. * - NUT_IRQCTL_STATUS Query interrupt status.
  75. * - NUT_IRQCTL_ENABLE Enable interrupt.
  76. * - NUT_IRQCTL_DISABLE Disable interrupt.
  77. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  78. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  79. * \param param Pointer to optional parameter.
  80. *
  81. * \return 0 on success, -1 otherwise.
  82. */
  83. static int AvrTimer3InCaptIrqCtl(int cmd, void *param)
  84. {
  85. int rc = 0;
  86. unsigned int *ival = (unsigned int *) param;
  87. int_fast8_t enabled = bit_is_set(INT_MASK_REG, INT_ENABLE_BIT);
  88. /* Disable interrupt. */
  89. cbi(INT_MASK_REG, INT_ENABLE_BIT);
  90. switch (cmd) {
  91. case NUT_IRQCTL_INIT:
  92. case NUT_IRQCTL_CLEAR:
  93. /* Clear any pending interrupt. */
  94. outb(INT_STATUS_REG, _BV(INT_STATUS_BIT));
  95. break;
  96. case NUT_IRQCTL_STATUS:
  97. if (bit_is_set(INT_STATUS_REG, INT_STATUS_BIT)) {
  98. *ival = 1;
  99. } else {
  100. *ival = 0;
  101. }
  102. if (enabled) {
  103. *ival |= 0x80;
  104. }
  105. break;
  106. case NUT_IRQCTL_ENABLE:
  107. enabled = 1;
  108. break;
  109. case NUT_IRQCTL_DISABLE:
  110. enabled = 0;
  111. break;
  112. case NUT_IRQCTL_GETPRIO:
  113. *ival = INT_PRIORITY;
  114. break;
  115. #ifdef NUT_PERFMON
  116. case NUT_IRQCTL_GETCOUNT:
  117. *ival = (unsigned int) sig_INPUT_CAPTURE3.ir_count;
  118. sig_INPUT_CAPTURE3.ir_count = 0;
  119. break;
  120. #endif
  121. default:
  122. rc = -1;
  123. break;
  124. }
  125. /* Enable interrupt. */
  126. if (enabled) {
  127. sbi(INT_MASK_REG, INT_ENABLE_BIT);
  128. }
  129. return rc;
  130. }
  131. /*! \fn TIMER3_CAPT_vect(void)
  132. * \brief Timer 3 input capture interrupt entry.
  133. */
  134. #ifdef __IMAGECRAFT__
  135. #pragma interrupt_handler TIMER3_CAPT_vect:iv_TIMER3_CAPT
  136. #endif
  137. NUTSIGNAL(TIMER3_CAPT_vect, sig_INPUT_CAPTURE3)
  138. #endif
  139. /*@}*/