ih_timer3_compa.c 4.8 KB

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  1. /*
  2. * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*!
  34. * \file arch/avr/dev/ih_timer3_compa.c
  35. * \brief Timer/Counter 3 compare match A interrupt.
  36. *
  37. * \verbatim
  38. * $Id: ih_timer3_compa.c 4706 2012-10-06 17:42:01Z haraldkipp $
  39. * \endverbatim
  40. */
  41. #include <dev/irqreg.h>
  42. #if defined(MCU_AT90CAN128) || defined(MCU_ATMEGA2560) || defined(MCU_ATMEGA2561) || defined(MCU_AT90USB1287)
  43. #define INT_MASK_REG TIMSK3
  44. #define INT_STATUS_REG TIFR3
  45. #define INT_ENABLE_BIT OCIE3A
  46. #define INT_STATUS_BIT OCF3A
  47. #define INT_PRIORITY 27
  48. #else
  49. #define INT_MASK_REG ETIMSK
  50. #define INT_STATUS_REG ETIFR
  51. #define INT_ENABLE_BIT OCIE3A
  52. #define INT_STATUS_BIT OCF3A
  53. #define INT_PRIORITY 25
  54. #endif
  55. /*!
  56. * \addtogroup xgIrqReg
  57. */
  58. /*@{*/
  59. #if defined(TIMER3_COMPA_vect) || defined(iv_TIMER3_COMPA)
  60. static int AvrTimer3CompAIrqCtl(int cmd, void *param);
  61. IRQ_HANDLER sig_OUTPUT_COMPARE3A = {
  62. #ifdef NUT_PERFMON
  63. 0, /* Interrupt counter, ir_count. */
  64. #endif
  65. NULL, /* Passed argument, ir_arg. */
  66. NULL, /* Handler subroutine, ir_handler. */
  67. AvrTimer3CompAIrqCtl /* Interrupt control, ir_ctl. */
  68. };
  69. /*!
  70. * \brief Timer/Counter 3 compare match A interrupt control.
  71. *
  72. * \param cmd Control command.
  73. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  74. * - NUT_IRQCTL_CLEAR Clear interrupt.
  75. * - NUT_IRQCTL_STATUS Query interrupt status.
  76. * - NUT_IRQCTL_ENABLE Enable interrupt.
  77. * - NUT_IRQCTL_DISABLE Disable interrupt.
  78. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  79. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  80. * \param param Pointer to optional parameter.
  81. *
  82. * \return 0 on success, -1 otherwise.
  83. */
  84. static int AvrTimer3CompAIrqCtl(int cmd, void *param)
  85. {
  86. int rc = 0;
  87. unsigned int *ival = (unsigned int *) param;
  88. int_fast8_t enabled = bit_is_set(INT_MASK_REG, INT_ENABLE_BIT);
  89. /* Disable interrupt. */
  90. cbi(INT_MASK_REG, INT_ENABLE_BIT);
  91. switch (cmd) {
  92. case NUT_IRQCTL_INIT:
  93. enabled = 0;
  94. case NUT_IRQCTL_CLEAR:
  95. /* Clear any pending interrupt. */
  96. outb(INT_STATUS_REG, _BV(INT_STATUS_BIT));
  97. break;
  98. case NUT_IRQCTL_STATUS:
  99. if (bit_is_set(INT_STATUS_REG, INT_STATUS_BIT)) {
  100. *ival = 1;
  101. } else {
  102. *ival = 0;
  103. }
  104. if (enabled) {
  105. *ival |= 0x80;
  106. }
  107. break;
  108. case NUT_IRQCTL_ENABLE:
  109. enabled = 1;
  110. break;
  111. case NUT_IRQCTL_DISABLE:
  112. enabled = 0;
  113. break;
  114. case NUT_IRQCTL_GETPRIO:
  115. *ival = INT_PRIORITY;
  116. break;
  117. #ifdef NUT_PERFMON
  118. case NUT_IRQCTL_GETCOUNT:
  119. *ival = (unsigned int) sig_OUTPUT_COMPARE3A.ir_count;
  120. sig_OUTPUT_COMPARE3A.ir_count = 0;
  121. break;
  122. #endif
  123. default:
  124. rc = -1;
  125. break;
  126. }
  127. /* Enable interrupt. */
  128. if (enabled) {
  129. sbi(INT_MASK_REG, INT_ENABLE_BIT);
  130. }
  131. return rc;
  132. }
  133. /*! \fn TIMER3_COMPA_vect(void)
  134. * \brief Timer 3A output compare interrupt entry.
  135. */
  136. #ifdef __IMAGECRAFT__
  137. #pragma interrupt_handler TIMER3_COMPA_vect:iv_TIMER3_COMPA
  138. #endif
  139. NUTSIGNAL(TIMER3_COMPA_vect, sig_OUTPUT_COMPARE3A)
  140. #endif
  141. /*@}*/