ih_usart0_rx.c 4.5 KB

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  1. /*
  2. * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. /*!
  34. * \file arch/avr/dev/ih_usart0_rx.c
  35. * \brief USART0 receive complete interrupt.
  36. *
  37. * \verbatim
  38. * $Id: ih_usart0_rx.c 4937 2013-01-22 11:38:42Z haraldkipp $
  39. * \endverbatim
  40. */
  41. #include <dev/irqreg.h>
  42. /*!
  43. * \addtogroup xgIrqReg
  44. */
  45. /*@{*/
  46. static int AvrUart0RxIrqCtl(int cmd, void *param);
  47. IRQ_HANDLER sig_UART0_RECV = {
  48. #ifdef NUT_PERFMON
  49. 0, /* Interrupt counter, ir_count. */
  50. #endif
  51. NULL, /* Passed argument, ir_arg. */
  52. NULL, /* Handler subroutine, ir_handler. */
  53. AvrUart0RxIrqCtl /* Interrupt control, ir_ctl. */
  54. };
  55. /*!
  56. * \brief USART0 receive complete interrupt.
  57. *
  58. * \param cmd Control command.
  59. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  60. * - NUT_IRQCTL_CLEAR Clear interrupt.
  61. * - NUT_IRQCTL_STATUS Query interrupt status.
  62. * - NUT_IRQCTL_ENABLE Enable interrupt.
  63. * - NUT_IRQCTL_DISABLE Disable interrupt.
  64. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  65. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  66. * \param param Pointer to optional parameter.
  67. *
  68. * \return 0 on success, -1 otherwise.
  69. */
  70. static int AvrUart0RxIrqCtl(int cmd, void *param)
  71. {
  72. int rc = 0;
  73. unsigned int *ival = (unsigned int *) param;
  74. int_fast8_t enabled = bit_is_set(UCR, RXCIE);
  75. /* Disable interrupt. */
  76. cbi(UCR, RXCIE);
  77. switch (cmd) {
  78. case NUT_IRQCTL_INIT:
  79. enabled = 0;
  80. case NUT_IRQCTL_CLEAR:
  81. /* Clear any pending interrupt. */
  82. inb(UDR);
  83. inb(UDR);
  84. break;
  85. case NUT_IRQCTL_STATUS:
  86. if (bit_is_set(USR, RXC)) {
  87. *ival = 1;
  88. } else {
  89. *ival = 0;
  90. }
  91. if (enabled) {
  92. *ival |= 0x80;
  93. }
  94. break;
  95. case NUT_IRQCTL_ENABLE:
  96. enabled = 1;
  97. break;
  98. case NUT_IRQCTL_DISABLE:
  99. enabled = 0;
  100. break;
  101. case NUT_IRQCTL_GETPRIO:
  102. *ival = 16;
  103. break;
  104. #ifdef NUT_PERFMON
  105. case NUT_IRQCTL_GETCOUNT:
  106. *ival = (unsigned int) sig_UART0_RECV.ir_count;
  107. sig_UART0_RECV.ir_count = 0;
  108. break;
  109. #endif
  110. default:
  111. rc = -1;
  112. break;
  113. }
  114. /* Enable interrupt. */
  115. if (enabled) {
  116. sbi(UCR, RXCIE);
  117. }
  118. return rc;
  119. }
  120. /* avr-libc names the vector as in the datasheets. As Atmel naming is
  121. * inconsistant, so is the avr-libc naming.
  122. * Equalize!
  123. */
  124. #if !defined(USART0_RX_vect) && defined( UART0_RX_vect)
  125. #define USART0_RX_vect UART0_RX_vect
  126. #elif !defined(USART0_RX_vect) && defined(UART_RX_vect)
  127. #define USART0_RX_vect UART_RX_vect
  128. #endif
  129. /*! \fn UART0_RX_vect(void)
  130. * \brief Uart0 receive complete interrupt entry.
  131. */
  132. #ifdef __IMAGECRAFT__
  133. #if defined(iv_USART0_RX)
  134. #pragma interrupt_handler USART0_RX_vect:iv_USART0_RX
  135. #else
  136. #pragma interrupt_handler USART0_RX_vect:iv_UART_RX
  137. #endif
  138. #endif
  139. NUTSIGNAL(USART0_RX_vect, sig_UART0_RECV)
  140. /*@}*/