ih_spi1.c 4.2 KB

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  1. /*!
  2. * Copyright (C) 2001-2010 by egnite Software GmbH
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*
  35. * $Log: ih_spi1.c,v $
  36. *
  37. */
  38. #include <arch/avr32.h>
  39. #include <dev/irqreg.h>
  40. #include <avr32/io.h>
  41. #include <arch/avr32/ihndlr.h>
  42. #ifndef NUT_IRQPRI_SPI1
  43. #define NUT_IRQPRI_SPI1 AVR32_INTC_INT3
  44. #endif
  45. static int SerialPeripheral1IrqCtl(int cmd, void *param);
  46. IRQ_HANDLER sig_SPI1 = {
  47. #ifdef NUT_PERFMON
  48. 0, /* Interrupt counter, ir_count. */
  49. #endif
  50. NULL, /* Passed argument, ir_arg. */
  51. NULL, /* Handler subroutine, ir_handler. */
  52. SerialPeripheral1IrqCtl /* Interrupt control, ir_ctl. */
  53. };
  54. /*!
  55. * \brief Serial peripheral interface 0 interrupt entry.
  56. */
  57. static SIGNAL(SerialPeripheral1IrqEntry)
  58. {
  59. IRQ_ENTRY();
  60. #ifdef NUT_PERFMON
  61. sig_SPI1.ir_count++;
  62. #endif
  63. if (sig_SPI1.ir_handler) {
  64. (sig_SPI1.ir_handler) (sig_SPI1.ir_arg);
  65. }
  66. IRQ_EXIT();
  67. }
  68. /*!
  69. * \brief Serial peripheral interface 1 interrupt control.
  70. *
  71. * \param cmd Control command.
  72. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  73. * - NUT_IRQCTL_STATUS Query interrupt status.
  74. * - NUT_IRQCTL_ENABLE Enable interrupt.
  75. * - NUT_IRQCTL_DISABLE Disable interrupt.
  76. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  77. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  78. * \param param Pointer to optional parameter.
  79. *
  80. * \return 0 on success, -1 otherwise.
  81. */
  82. static int SerialPeripheral1IrqCtl(int cmd, void *param)
  83. {
  84. int rc = 0;
  85. unsigned int *ival = (unsigned int *) param;
  86. ureg_t imr = AVR32_SPI1.imr;
  87. static ureg_t enabledIMR = 0;
  88. int_fast8_t enabled = imr;
  89. /* Disable interrupt. */
  90. if (enabled) {
  91. AVR32_SPI1.idr = 0xFFFFFFFF;
  92. AVR32_SPI1.idr;
  93. enabledIMR = imr;
  94. }
  95. switch (cmd) {
  96. case NUT_IRQCTL_INIT:
  97. /* Set the vector. */
  98. register_interrupt(SerialPeripheral1IrqEntry, AVR32_SPI1_IRQ, NUT_IRQPRI_SPI1);
  99. break;
  100. case NUT_IRQCTL_STATUS:
  101. if (enabled) {
  102. *ival |= 1;
  103. } else {
  104. *ival &= ~1;
  105. }
  106. break;
  107. case NUT_IRQCTL_ENABLE:
  108. enabled = 1;
  109. break;
  110. case NUT_IRQCTL_DISABLE:
  111. enabled = 0;
  112. break;
  113. case NUT_IRQCTL_GETPRIO:
  114. *ival = AVR32_INTC_INT3;
  115. break;
  116. #ifdef NUT_PERFMON
  117. case NUT_IRQCTL_GETCOUNT:
  118. *ival = (unsigned int) sig_SPI1.ir_count;
  119. sig_SPI1.ir_count = 0;
  120. break;
  121. #endif
  122. default:
  123. rc = -1;
  124. break;
  125. }
  126. /* Enable interrupt. */
  127. if (enabled) {
  128. AVR32_SPI1.ier = enabledIMR;
  129. }
  130. return rc;
  131. }