ostimer_uc3l.c 2.8 KB

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  1. /*
  2. * Copyright (C) 2001-2007 by egnite Software GmbH. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
  21. * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. *
  32. */
  33. // This is the source implementation for model specific
  34. // routines for UC3 family
  35. // Functions here are documented in ostimer.c
  36. /*!
  37. * \brief Determine the PLL output clock frequency.
  38. *
  39. * \param pll Specifies the PLL, 0 for PLL0, 1 for PLL1.
  40. *
  41. * \return Frequency of the selected PLL in Hertz.
  42. */
  43. /*!
  44. * \brief Determine the processor clock frequency.
  45. *
  46. * \return CPU clock frequency in Hertz.
  47. */
  48. uint32_t NutArchClockGet(int idx)
  49. {
  50. uint32_t rc = AVR32_PM_PBA_MAX_FREQ;
  51. if (idx == NUT_HWCLK_CPU || idx == NUT_HWCLK_PERIPHERAL_HSB) {
  52. rc = 50000000;
  53. } else if (idx == NUT_HWCLK_PERIPHERAL_A) {
  54. /* Get PBA Clock */
  55. rc = 50000000 / 2;
  56. } else if (idx == NUT_HWCLK_PERIPHERAL_B) {
  57. /* Get PBB Clock */
  58. rc = 50000000 / 2;
  59. } else if (idx == NUT_HWCLK_SLOW_CLOCK) {
  60. /* Can be changed using the RCCR register
  61. but there is no information on the datasheet yet
  62. on how to do so. Therefore we don't know how to calculate
  63. non-default values yet. */
  64. #if defined( __AVR32_AP7000__ )
  65. rc = 32768; // AP7000 has no constant for slow clock, but this is the same as XIN32, which should be 32768hz
  66. #else
  67. rc = 0;
  68. #endif
  69. }
  70. return rc;
  71. }