ksk_lpc1788_sk.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2012 by Ole Reinhardt (ole.reinhardt@embedded-it.de)
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*
  35. * \file arch/cm3/board/ksk_lpc1788_sk.c
  36. * \brief IAR KSK LPC1788 SK eval board initialization.
  37. *
  38. *
  39. * \verbatim
  40. * $Id: $
  41. * \endverbatim
  42. */
  43. #include <arch/cm3.h>
  44. #include <inttypes.h>
  45. #include <sys/timer.h>
  46. #include <arch/cm3/nxp/lpc177x_8x_clk.h>
  47. #include <arch/cm3/nxp/lpc177x_8x_emc.h>
  48. #include <dev/gpio.h>
  49. #include <dev/sdram.h>
  50. #include <sys/heap.h>
  51. /* SDRAM configuration for IAR KSK LPC1788 evaluation board */
  52. /* configuration for K4S561632J sdram. */
  53. #define SDRAM_BASE_ADDR 0xA0000000
  54. #define SDRAM_SIZE 0x04000000
  55. /* Samsung K4S561632J SDRAMs */
  56. static SDRAM sdram_k4s561632j = {
  57. .base_addr = SDRAM_BASE_ADDR,
  58. .size = SDRAM_SIZE,
  59. .bus_width = 32,
  60. .rows = 13,
  61. .cols = 9,
  62. .ras_latency = 3,
  63. .cas_latency = 3,
  64. .tRP = 20,
  65. .tRAS = 45,
  66. .tSREX = 67, /* same as .tXSR */
  67. .tAPR = 1,
  68. .tDAL = 3,
  69. .tWR = 3,
  70. .tRC = 65,
  71. .tRFC = 66,
  72. .tXSR = 67,
  73. .tRRD = 15,
  74. .tMRD = 3,
  75. .refresh = 7813,
  76. };
  77. /*!
  78. * \brief Early KSK LPC1788 SK hardware initialization. Especialy SD-RAM
  79. *
  80. * This routine is called during system initalization.
  81. */
  82. void NutBoardInit(void)
  83. {
  84. int i;
  85. /* Configure SDRAM interface GPIO Pins */
  86. /* Pin configuration:
  87. * P2.14 - /EMC_CS2 - not used
  88. * P2.15 - /EMC_CS3 - not used
  89. *
  90. * P2.16 - /EMC_CAS
  91. * P2.17 - /EMC_RAS
  92. * P2.18 - EMC_CLK[0]
  93. * P2.19 - EMC_CLK[1]
  94. *
  95. * P2.20 - EMC_DYCS0
  96. * P2.21 - EMC_DYCS1 - not used
  97. * P2.22 - EMC_DYCS2 - not used
  98. * P2.23 - EMC_DYCS3 - not used
  99. *
  100. * P2.24 - EMC_CKE0
  101. * P2.25 - EMC_CKE1 - not used
  102. * P2.26 - EMC_CKE2 - not used
  103. * P2.27 - EMC_CKE3 - not used
  104. *
  105. * P2.28 - EMC_DQM0
  106. * P2.29 - EMC_DQM1
  107. * P2.30 - EMC_DQM2
  108. * P2.31 - EMC_DQM3
  109. *
  110. * P3.0-P3.31 - EMC_D[0-31]
  111. * P4.0-P4.23 - EMC_A[0-23] - only A0 .. A14 used
  112. *
  113. * P4.24 - /EMC_OE - not used
  114. * P4.25 - /EMC_WE
  115. *
  116. * P4.30 - /EMC_CS0 - not used
  117. * P4.31 - /EMC_CS1 - not used
  118. */
  119. GpioPinConfigSet(NUTGPIO_PORT2, 16, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  120. GpioPinConfigSet(NUTGPIO_PORT2, 17, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  121. GpioPinConfigSet(NUTGPIO_PORT2, 18, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  122. GpioPinConfigSet(NUTGPIO_PORT2, 20, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  123. GpioPinConfigSet(NUTGPIO_PORT2, 24, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  124. GpioPinConfigSet(NUTGPIO_PORT2, 28, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  125. GpioPinConfigSet(NUTGPIO_PORT2, 29, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  126. GpioPinConfigSet(NUTGPIO_PORT2, 30, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  127. GpioPinConfigSet(NUTGPIO_PORT2, 31, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  128. /* Configure D0 .. D31 */
  129. for(i = 0; i < 32; i++) {
  130. GpioPinConfigSet(NUTGPIO_PORT3, i, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL | GPIO_CFG_REPEATER);
  131. }
  132. /* Configure A0 .. A12, A13 and A14 used as bank select */
  133. for(i = 0; i < 15; i++) {
  134. GpioPinConfigSet(NUTGPIO_PORT4, i, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  135. }
  136. GpioPinConfigSet(NUTGPIO_PORT4, 25, GPIO_CFG_PERIPHERAL1 | GPIO_CFG_SLEWCTRL);
  137. /* Initialize the external memory controller */
  138. Lpc177x_8x_EmcInit();
  139. Lpc177x_8x_EmcSDRAMInit(sdram_k4s561632j, 0x00004680 /* 13 rows, 9 cols, 16Mx32, 64MB */);
  140. }
  141. /*!
  142. * \brief Adjust the sdram timings to compensate temperature drifts
  143. *
  144. * This function is called as timer callback which was initialised at NutIdleInit()
  145. */
  146. static void adjust_sdram_timing(HANDLE this, void* arg)
  147. {
  148. Lpc177x_8x_EmcSDRAMAdjustTiming();
  149. }
  150. /*!
  151. * \brief Extended system initialisation. Add sdram memory to the available memory
  152. *
  153. * This routine is called during system initialisation right before the idle
  154. * thread is created. We will use it to add the SDRAM memory space to out heap.
  155. */
  156. void NutIdleInit(void)
  157. {
  158. /* Sanity check if the sdram is working. If all is fine add the sdram to
  159. heap space.
  160. */
  161. if (Lpc177x_8x_EmcSDRAMCheck(sdram_k4s561632j, 0xaa55) == 0) {
  162. NutHeapAdd((void*)sdram_k4s561632j.base_addr, sdram_k4s561632j.size);
  163. }
  164. /* Initialise a timer that re-calibrates the delay loops once a minute to
  165. compensate temperature drift of the sdram controller
  166. */
  167. NutTimerStart(60000, adjust_sdram_timing, NULL, 0);
  168. }