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ih_stm32.c

ih_stm32.c 16 KB
Istoric Crud

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  1. /*
    2. 

  2.  * Copyright (C) 2013 Uwe Bonnes(bon@elektron.ikp.physik.tu-darmstadty.de).
    3. 

  3.  *
    4. 

  4.  * Redistribution and use in source and binary forms, with or without
    5. 

  5.  * modification, are permitted provided that the following conditions
    6. 

  6.  * are met:
    7. 

  7.  *
    8. 

  8.  * 1. Redistributions of source code must retain the above copyright
    9. 

  9.  *    notice, this list of conditions and the following disclaimer.
    10. 

  10.  * 2. Redistributions in binary form must reproduce the above copyright
    11. 

  11.  *    notice, this list of conditions and the following disclaimer in the
    12. 

  12.  *    documentation and/or other materials provided with the distribution.
    13. 

  13.  * 3. Neither the name of the copyright holders nor the names of
    14. 

  14.  *    contributors may be used to endorse or promote products derived
    15. 

  15.  *    from this software without specific prior written permission.
    16. 

  16.  *
    17. 

  17.  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    18. 

  18.  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    19. 

  19.  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    20. 

  20.  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    21. 

  21.  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    22. 

  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    23. 

  23.  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
    24. 

  24.  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
    25. 

  25.  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
    26. 

  26.  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
    27. 

  27.  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    28. 

  28.  * SUCH DAMAGE.
    29. 

  29.  *
    30. 

  30.  * For additional information see http://www.ethernut.de/
    31. 

  31.  *
    32. 

  32.  */
    33. 

  33. 

  34. /*
    35. 

  35.  * $Log$
    36. 

  36.  * Revision 1.0  2011/12/09 17:30:10  ulrichprinz
    37. 

  37.  * Initial version.
    38. 

  38.  *
    39. 

  39.  */
    40. 

  40. 

  41. #include <cfg/arch.h>
    42. 

  42. #include <cfg/devices.h>
    43. 

  43. #include <arch/cm3.h>
    44. 

  44. #include <dev/irqreg.h>
    45. 

  45. 

  46. #ifndef NUT_IRQPRI_DEF
    47. 

  47. #define NUT_IRQPRI_DEF  4
    48. 

  48. #endif
    49. 

  49. /* sig_INTERRUPTX needs special handling for level sensivity and multiple
    50. 

  50.    occupancy*/
    51. 

  51. 

  52. /* We can't use XXX_IRQn to check for availability, as XXX_IRQn is an enum
    53. 

  53.    not usable for the preprocessor.
    54. 

  54.    - If the Device is available on all devices in a family but not for all
    55. 

  55.      families, for the device specific structure (e.g. USART6).
    56. 

  56.    - If the device is only available on some F1 devices, create a configurator
    57. 

  57.      item with the HW_XXX_STM32 value.
    58. 

  58. */
    59. 

  59. CREATE_HANDLER(WWDG,          WWDG,     NUT_IRQPRI_DEF);    /* Window Watchdog */
    60. 

  60. #if defined (STM32F072)
    61. 

  61. CREATE_HANDLER(PVD,           PVD_VDDIO2, NUT_IRQPRI_DEF);    /* PVD through EXTI */
    62. 

  62. #else
    63. 

  63. CREATE_HANDLER(PVD,           PVD,      NUT_IRQPRI_DEF);    /* PVD through EXTI */
    64. 

  64. #endif
    65. 

  65. CREATE_HANDLER(FLASH,         FLASH,    NUT_IRQPRI_DEF);    /* Flash global */
    66. 

  66. #if defined (STM32F072)
    67. 

  67. CREATE_HANDLER(RCC,           RCC_CRS,  NUT_IRQPRI_DEF);    /* RCC global */
    68. 

  68. #else
    69. 

  69. CREATE_HANDLER(RCC,           RCC,      NUT_IRQPRI_DEF);    /* RCC global */
    70. 

  70. #endif
    71. 

  71. #if defined(HW_RTC_STM32F1)
    72. 

  72. CREATE_HANDLER(RTC,           RTC,      NUT_IRQPRI_DEF);    // Real Time Clock
    73. 

  73. #endif
    74. 

  74. #if defined(HW_RTC_STM32_V2)
    75. 

  75. CREATE_HANDLER(RTC,           RTC_Alarm,NUT_IRQPRI_DEF);    // Real Time Clock
    76. 

  76. #endif
    77. 

  77. 

  78. CREATE_HANDLER(SPI1,          SPI1,     NUT_IRQPRI_DEF);     // SPI 1 Controller
    79. 

  79. #if defined(HW_SPI2_STM32)
    80. 

  80. CREATE_HANDLER(SPI2,          SPI2,     NUT_IRQPRI_DEF);     // SPI 2 Controller
    81. 

  81. #endif
    82. 

  82. #if defined(HW_SPI3_STM32)
    83. 

  83. CREATE_HANDLER(SPI3,          SPI3,     NUT_IRQPRI_DEF);     // SPI 3 Controller
    84. 

  84. #endif
    85. 

  85. #if defined(HW_SPI4_STM32)
    86. 

  86. CREATE_HANDLER(SPI4,          SPI4,     NUT_IRQPRI_DEF);     // SPI 4 Controller
    87. 

  87. #endif
    88. 

  88. #if defined(HW_SPI5_STM32)
    89. 

  89. CREATE_HANDLER(SPI5,          SPI5,     NUT_IRQPRI_DEF);     // SPI 5 Controller
    90. 

  90. #endif
    91. 

  91. #if defined(HW_SPI6_STM32)
    92. 

  92. CREATE_HANDLER(SPI6,          SPI6,     NUT_IRQPRI_DEF);     // SPI 6 Controller
    93. 

  93. #endif
    94. 

  94. 

  95. #if defined(HW_SDIO_STM32)
    96. 

  96. CREATE_HANDLER(SDIO,          SDIO,     NUT_IRQPRI_DEF);     // SDIO Controller
    97. 

  97. #endif
    98. 

  98. 

  99. #if defined(HW_SAI1_STM32)
    100. 

  100. CREATE_HANDLER(SAI1,          SAI1,     NUT_IRQPRI_DEF);     // SPI 2 Controller
    101. 

  101. #endif
    102. 

  102. 

  103. #if defined (MCU_STM32F0)
    104. 

  104. CREATE_HANDLER(TWI1,          I2C1,     NUT_IRQPRI_DEF);     // I2C 1 Data/Event
    105. 

  105. #else
    106. 

  106. CREATE_HANDLER(TWI1_EV,       I2C1_EV,  NUT_IRQPRI_DEF);     // I2C 1 Data/Event
    107. 

  107. CREATE_HANDLER(TWI1_ER,       I2C1_ER,  NUT_IRQPRI_DEF);     // I2C 2 Data/Event
    108. 

  108. #endif
    109. 

  109. 

  110. #if defined(HW_I2C2_STM32)
    111. 

  111. #if defined (MCU_STM32F0)
    112. 

  112. CREATE_HANDLER(TWI2,          I2C2,     NUT_IRQPRI_DEF);     // I2C 1 Data/Event
    113. 

  113. #else
    114. 

  114. CREATE_HANDLER(TWI2_EV,       I2C2_EV,  NUT_IRQPRI_DEF);     // I2C 2 Data/Event
    115. 

  115. CREATE_HANDLER(TWI2_ER,       I2C2_ER,  NUT_IRQPRI_DEF);     // I2C 1 Error
    116. 

  116. #endif
    117. 

  117. #endif
    118. 

  118. #if defined(HW_I2C3_STM32)
    119. 

  119. CREATE_HANDLER(TWI3_EV,       I2C3_EV,  NUT_IRQPRI_DEF);     // I2C 2 Error
    120. 

  120. CREATE_HANDLER(TWI3_ER,       I2C3_ER,  NUT_IRQPRI_DEF);     // I2C 2 Error
    121. 

  121. #endif
    122. 

  122. #if defined(HW_USB_CAN1_STM32) || defined(STM32F30X)
    123. 

  123. CREATE_HANDLER(CAN1_TX,       USB_HP_CAN1_TX,  NUT_IRQPRI_DEF);  // CAN 1 TX
    124. 

  124. CREATE_HANDLER(CAN1_RX0,      USB_LP_CAN1_RX0, NUT_IRQPRI_DEF);  // CAN 1 RX0
    125. 

  125. CREATE_HANDLER(CAN1_RX1,      CAN1_RX1,        NUT_IRQPRI_DEF);  // CAN 1 RX1
    126. 

  126. CREATE_HANDLER(CAN1_SCE,      CAN1_SCE,        NUT_IRQPRI_DEF);  // CAN 1 SCE
    127. 

  127. #elif defined(HW_CAN1_STM32)
    128. 

  128. CREATE_HANDLER(CAN1_TX,       CAN1_TX,         NUT_IRQPRI_DEF);  // CAN 1 TX
    129. 

  129. CREATE_HANDLER(CAN1_RX0,      CAN1_RX0,        NUT_IRQPRI_DEF);  // CAN 1 RX0
    130. 

  130. CREATE_HANDLER(CAN1_RX1,      CAN1_RX1,        NUT_IRQPRI_DEF);  // CAN 1 RX1
    131. 

  131. CREATE_HANDLER(CAN1_SCE,      CAN1_SCE,        NUT_IRQPRI_DEF);  // CAN 1 SCE
    132. 

  132. #endif
    133. 

  133. #if defined(HW_CAN2_STM32)
    134. 

  134. CREATE_HANDLER(CAN2_TX,       CAN2_TX,         NUT_IRQPRI_DEF);  // CAN 2 TX
    135. 

  135. CREATE_HANDLER(CAN2_RX0,      CAN2_RX0,        NUT_IRQPRI_DEF);  // CAN 2 RX0
    136. 

  136. CREATE_HANDLER(CAN2_RX1,      CAN2_RX1,        NUT_IRQPRI_DEF);  // CAN 2 RX1
    137. 

  137. CREATE_HANDLER(CAN2_SCE,      CAN2_SCE,        NUT_IRQPRI_DEF);  // CAN 2 SCE
    138. 

  138. #endif
    139. 

  139. #if defined(HW_USB_STM32)
    140. 

  140. CREATE_HANDLER(USB_HP,        USB_HP,          NUT_IRQPRI_DEF);  // USB High Priority, separted
    141. 

  141. CREATE_HANDLER(USB_LP,        USB_LP,          NUT_IRQPRI_DEF);  // USB Low Priority, separted
    142. 

  142. #if defined(STM32F30X)
    143. 

  143. CREATE_HANDLER(USB_WAKE,      USBWakeUp_RMP,   NUT_IRQPRI_DEF);  // USB Wake Priority, separted
    144. 

  144. #else
    145. 

  145. CREATE_HANDLER(USB_WAKE,      USBWakeUp,   NUT_IRQPRI_DEF);  // USB Wake Priority, separted
    146. 

  146. #endif
    147. 

  147. #endif
    148. 

  148. 

  149. CREATE_HANDLER(USART1,        USART1,          NUT_IRQPRI_DEF);  // USART 1
    150. 

  150. #if defined(HW_USART2_STM32)
    151. 

  151. CREATE_HANDLER(USART2,        USART2,          NUT_IRQPRI_DEF);  // USART 2
    152. 

  152. #endif
    153. 

  153. #if defined(HW_USART3_STM32)
    154. 

  154. CREATE_HANDLER(USART3,        USART3,          NUT_IRQPRI_DEF);  // USART 3
    155. 

  155. #endif
    156. 

  156. #if defined(HW_UART4_STM32)
    157. 

  157. CREATE_HANDLER(UART4,         UART4,           NUT_IRQPRI_DEF);  // UART 4
    158. 

  158. #endif
    159. 

  159. #if defined(HW_USART3_4_STM32)
    160. 

  160. CREATE_HANDLER(UART3_4,       UART3_4,         NUT_IRQPRI_DEF);  // UART 3/4 combined
    161. 

  161. #endif
    162. 

  162. #if defined(HW_UART5_STM32)
    163. 

  163. CREATE_HANDLER(UART5,         UART5,           NUT_IRQPRI_DEF);  // UART 5
    164. 

  164. #endif
    165. 

  165. #if defined(HW_USART6_STM32)
    166. 

  166. CREATE_HANDLER(USART6,        USART6,          NUT_IRQPRI_DEF);  // USART 6
    167. 

  167. #endif
    168. 

  168. #if defined(HW_UART7_STM32)
    169. 

  169. CREATE_HANDLER(UART7,         UART7,          NUT_IRQPRI_DEF);  // UART 7
    170. 

  170. #endif
    171. 

  171. #if defined(HW_UART8_STM32)
    172. 

  172. CREATE_HANDLER(UART8,         UART8,          NUT_IRQPRI_DEF);  // UART 8
    173. 

  173. #endif
    174. 

  174. 

  175. #if defined (STM32F072)
    176. 

  176. CREATE_HANDLER(DMA1_CH1, DMA1_Channel1      ,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    177. 

  177. CREATE_HANDLER(DMA1_CH2, DMA1_Channel2_3    ,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    178. 

  178. CREATE_HANDLER(DMA1_CH3, DMA1_Channel4_5_6_7,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    179. 

  179. #elif defined (MCU_STM32F0)
    180. 

  180. CREATE_HANDLER(DMA1_CH1, DMA1_Channel1      ,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    181. 

  181. CREATE_HANDLER(DMA1_CH2, DMA1_Channel2_3    ,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    182. 

  182. CREATE_HANDLER(DMA1_CH3, DMA1_Channel4_5    ,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    183. 

  183. #elif defined (DMA1_Channel1_BASE)
    184. 

  184. CREATE_HANDLER(DMA1_CH1, DMA1_Channel1,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    185. 

  185. CREATE_HANDLER(DMA1_CH2, DMA1_Channel2,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    186. 

  186. CREATE_HANDLER(DMA1_CH3, DMA1_Channel3,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    187. 

  187. CREATE_HANDLER(DMA1_CH4, DMA1_Channel4,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    188. 

  188. CREATE_HANDLER(DMA1_CH5, DMA1_Channel5,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    189. 

  189. CREATE_HANDLER(DMA1_CH6, DMA1_Channel6,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    190. 

  190. CREATE_HANDLER(DMA1_CH7, DMA1_Channel7,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    191. 

  191. #endif
    192. 

  192. #if defined(HW_DMA2_STM32F1)
    193. 

  193. CREATE_HANDLER(DMA2_CH1, DMA2_Channel1,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    194. 

  194. CREATE_HANDLER(DMA2_CH2, DMA2_Channel2,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    195. 

  195. CREATE_HANDLER(DMA2_CH3, DMA2_Channel3,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    196. 

  196. CREATE_HANDLER(DMA2_CH4, DMA2_Channel4,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    197. 

  197. CREATE_HANDLER(DMA2_CH5, DMA2_Channel5,   NUT_IRQPRI_DEF); // DMA Controller 1 Channel 1
    198. 

  198. #endif
    199. 

  199. #if defined(DMA1_Stream0)
    200. 

  200. CREATE_HANDLER(DMA1_STREAM0, DMA1_Stream0,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 1
    201. 

  201. CREATE_HANDLER(DMA1_STREAM1, DMA1_Stream1,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 1
    202. 

  202. CREATE_HANDLER(DMA1_STREAM2, DMA1_Stream2,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 2
    203. 

  203. CREATE_HANDLER(DMA1_STREAM3, DMA1_Stream3,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 3
    204. 

  204. CREATE_HANDLER(DMA1_STREAM4, DMA1_Stream4,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 4
    205. 

  205. CREATE_HANDLER(DMA1_STREAM5, DMA1_Stream5,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 5
    206. 

  206. CREATE_HANDLER(DMA1_STREAM6, DMA1_Stream6,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 6
    207. 

  207. CREATE_HANDLER(DMA1_STREAM7, DMA1_Stream7,    NUT_IRQPRI_DEF); // DMA Controller 0 Stream 7
    208. 

  208. CREATE_HANDLER(DMA2_STREAM0, DMA2_Stream0,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 1
    209. 

  209. CREATE_HANDLER(DMA2_STREAM1, DMA2_Stream1,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 2
    210. 

  210. CREATE_HANDLER(DMA2_STREAM2, DMA2_Stream2,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 3
    211. 

  211. CREATE_HANDLER(DMA2_STREAM3, DMA2_Stream3,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 4
    212. 

  212. CREATE_HANDLER(DMA2_STREAM4, DMA2_Stream4,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 5
    213. 

  213. CREATE_HANDLER(DMA2_STREAM5, DMA2_Stream5,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 6
    214. 

  214. CREATE_HANDLER(DMA2_STREAM6, DMA2_Stream6,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 7
    215. 

  215. CREATE_HANDLER(DMA2_STREAM7, DMA2_Stream7,    NUT_IRQPRI_DEF); // DMA Controller 1 Stream 7
    216. 

  216. #endif
    217. 

  217. 

  218. #if defined(HW_EMAC_STM32)
    219. 

  219. CREATE_HANDLER(EMAC,          ETH,          NUT_IRQPRI_DEF);     // Ethernet global interrupt
    220. 

  220. CREATE_HANDLER(EMAC_WAKE,     ETH_WKUP,     NUT_IRQPRI_DEF);     // Ethernet global interrupt
    221. 

  221. #endif
    222. 

  222. #if defined(MCU_STM32F0)
    223. 

  223. CREATE_HANDLER(TIM1_BRK_UP_TRG_COM,      TIM1_BRK_UP_TRG_COM,     NUT_IRQPRI_DEF);
    224. 

  224. CREATE_HANDLER(TIM1_CC,       TIM1_CC,      NUT_IRQPRI_DEF);
    225. 

  225. #elif defined(STM32F30X) || defined(STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined(STM32F10X_HD_VL)
    226. 

  226. CREATE_HANDLER(TIM1_BRK_TIM15,      TIM1_BRK_TIM15,     NUT_IRQPRI_DEF);
    227. 

  227. CREATE_HANDLER(TIM1_UP_TIM16,       TIM1_UP_TIM16,      NUT_IRQPRI_DEF);
    228. 

  228. CREATE_HANDLER(TIM1_TRG_COM_TIM17,  TIM1_TRG_COM_TIM17, NUT_IRQPRI_DEF);
    229. 

  229. CREATE_HANDLER(TIM1_CC,             TIM1_CC,            NUT_IRQPRI_DEF);
    230. 

  230. #elif defined(MCU_STM32F4) || defined (MCU_STM32F2)
    231. 

  231. CREATE_HANDLER(TIM1_BRK_TIM9,       TIM1_BRK_TIM9,      NUT_IRQPRI_DEF);
    232. 

  232. CREATE_HANDLER(TIM1_UP_TIM10,       TIM1_UP_TIM10,      NUT_IRQPRI_DEF);
    233. 

  233. CREATE_HANDLER(TIM1_TRG_COM_TIM11,  TIM1_TRG_COM_TIM11, NUT_IRQPRI_DEF);
    234. 

  234. CREATE_HANDLER(TIM1_CC,             TIM1_CC,            NUT_IRQPRI_DEF);
    235. 

  235. #elif defined(HW_TIM1_STM32)
    236. 

  236. CREATE_HANDLER(TIM1_BRK,      TIM1_BRK,     NUT_IRQPRI_DEF);
    237. 

  237. CREATE_HANDLER(TIM1_UP,       TIM1_UP,      NUT_IRQPRI_DEF);
    238. 

  238. CREATE_HANDLER(TIM1_TRG_COM,  TIM1_TRG_COM, NUT_IRQPRI_DEF);
    239. 

  239. CREATE_HANDLER(TIM1_CC,       TIM1_CC,      NUT_IRQPRI_DEF);
    240. 

  240. #endif
    241. 

  241. 

  242. /* Only Tim2 up to TIM5 have always a single TIMx_IRQn*/
    243. 

  243. CREATE_HANDLER(TIM2,          TIM2,         NUT_IRQPRI_DEF);
    244. 

  244. CREATE_HANDLER(TIM3,          TIM3,         NUT_IRQPRI_DEF);
    245. 

  245. #if defined(HW_TIM4_STM32)
    246. 

  246. CREATE_HANDLER(TIM4,          TIM4,         NUT_IRQPRI_DEF);
    247. 

  247. #endif
    248. 

  248. #if defined(HW_TIM5_STM32)
    249. 

  249. CREATE_HANDLER(TIM5,          TIM5,         NUT_IRQPRI_DEF);
    250. 

  250. #endif
    251. 

  251. #if defined(HW_TIM6_STM32)
    252. 

  252. CREATE_HANDLER(TIM6,          TIM6,         NUT_IRQPRI_DEF);
    253. 

  253. #endif
    254. 

  254. #if defined(HW_TIM7_STM32)
    255. 

  255. CREATE_HANDLER(TIM7,          TIM7,         NUT_IRQPRI_DEF);
    256. 

  256. #endif
    257. 

  257. #if defined(HW_TIM8_STM32)
    258. 

  258. CREATE_HANDLER(TIM8_BRK,      TIM8_BRK,     NUT_IRQPRI_DEF);
    259. 

  259. CREATE_HANDLER(TIM8_UP,       TIM8_UP,      NUT_IRQPRI_DEF);
    260. 

  260. CREATE_HANDLER(TIM8_TRG_COM,  TIM8_TRG_COM, NUT_IRQPRI_DEF);
    261. 

  261. CREATE_HANDLER(TIM8_CC,       TIM8_CC,     NUT_IRQPRI_DEF);
    262. 

  262. #endif
    263. 

  263. #if defined(HW_TIM10_STM32)
    264. 

  264. CREATE_HANDLER(TIM10,          TIM10,         NUT_IRQPRI_DEF);
    265. 

  265. #endif
    266. 

  266. #if defined(HW_TIM11_STM32)
    267. 

  267. CREATE_HANDLER(TIM11,          TIM11,         NUT_IRQPRI_DEF);
    268. 

  268. #endif
    269. 

  269. #if defined(HW_TIM12_STM32)
    270. 

  270. CREATE_HANDLER(TIM12,          TIM12,         NUT_IRQPRI_DEF);
    271. 

  271. #endif
    272. 

  272. #if defined(HW_TIM13_STM32)
    273. 

  273. CREATE_HANDLER(TIM13,          TIM13,         NUT_IRQPRI_DEF);
    274. 

  274. #endif
    275. 

  275. #if defined(HW_TIM14_STM32)
    276. 

  276. CREATE_HANDLER(TIM14,          TIM14,         NUT_IRQPRI_DEF);
    277. 

  277. #endif
    278. 

  278. #if defined(HW_TIM15_STM32)
    279. 

  279. CREATE_HANDLER(TIM15,          TIM15,         NUT_IRQPRI_DEF);
    280. 

  280. #endif
    281. 

  281. #if defined(HW_TIM16_STM32)
    282. 

  282. CREATE_HANDLER(TIM16,          TIM16,         NUT_IRQPRI_DEF);
    283. 

  283. #endif
    284. 

  284. #if defined(HW_TIM17_STM32)
    285. 

  285. CREATE_HANDLER(TIM17,          TIM17,         NUT_IRQPRI_DEF);
    286. 

  286. #endif
    287. 

  287. #if defined(HW_TIM19_STM32)
    288. 

  288. CREATE_HANDLER(TIM19,          TIM19,         NUT_IRQPRI_DEF);
    289. 

  289. #endif
    290. 

  290. 

  291. #if defined(HW_ADC_STM32)
    292. 

  292. CREATE_HANDLER(ADC,            ADC,           NUT_IRQPRI_DEF);
    293. 

  293. #endif
    294. 

  294. #if defined(HW_ADC1_STM32) || defined(HW_ADC1_STM32F1)
    295. 

  295. CREATE_HANDLER(ADC1,           ADC1,           NUT_IRQPRI_DEF);
    296. 

  296. #endif
    297. 

  297. #if defined(HW_ADC1_2_STM32) || defined(HW_ADC1_2_STM32F1)
    298. 

  298. CREATE_HANDLER(ADC1_2,         ADC1_2,           NUT_IRQPRI_DEF);
    299. 

  299. #endif
    300. 

  300. #if defined(HW_ADC3_STM32) || defined(HW_ADC3_STM32F1)
    301. 

  301. CREATE_HANDLER(ADC3,           ADC3,           NUT_IRQPRI_DEF);
    302. 

  302. #endif
    303. 

  303. #if defined(HW_ADC4_STM32)
    304. 

  304. CREATE_HANDLER(ADC4,           ADC4,           NUT_IRQPRI_DEF);
    305. 

  305. #endif
    306. 

  306. 

  307. #if defined(HW_SDADC1_STM32)
    308. 

  308. CREATE_HANDLER(SDADC1,         SDADC1,       NUT_IRQPRI_DEF);
    309. 

  309. #endif
    310. 

  310. #if defined(HW_SDADC2_STM32)
    311. 

  311. CREATE_HANDLER(SDADC2,         SDADC2,       NUT_IRQPRI_DEF);
    312. 

  312. #endif
    313. 

  313. #if defined(HW_SDADC3_STM32)
    314. 

  314. CREATE_HANDLER(SDADC3,         SDADC3,       NUT_IRQPRI_DEF);
    315. 

  315. #endif
    316. 

  316. 

  317. #if defined(HW_HASH_STM32)
    318. 

  318. CREATE_HANDLER(HASH,            HASH,         NUT_IRQPRI_DEF);
    319. 

  319. #endif
    320. 

  320. 

  321. #if defined(HW_RNG_STM32)
    322. 

  322. CREATE_HANDLER(RNG,             HASH_RNG,     NUT_IRQPRI_DEF);
    323. 

  323. #endif
    324. 

  324. #if defined(HW_HASH_RNG_STM32)
    325. 

  325. CREATE_HANDLER(HASH_RNG,        HASH_RNG,     NUT_IRQPRI_DEF);
    326. 

  326. #endif
    327. 

  327. #if defined(HW_CRYP_STM32)
    328. 

  328. CREATE_HANDLER(CRYP,            CRYP,         NUT_IRQPRI_DEF);
    329. 

  329. #endif
    330. 

  330. 

  331. #if defined(HW_DCMI_STM32)
    332. 

  332. CREATE_HANDLER(DCMI,            DCMI,         NUT_IRQPRI_DEF);
    333. 

  333. #endif
    334. 

  334. 

  335. #if defined(HW_DMA2D_STM32)
    336. 

  336. CREATE_HANDLER(DMA2D,           DMA2D,        NUT_IRQPRI_DEF);
    337. 

  337. #endif
    338. 

  338. 

  339. #if defined(HW_LTDC_STM32)
    340. 

  340. CREATE_HANDLER(LTDC,            LTDC,         NUT_IRQPRI_DEF);
    341. 

  341. #endif
    342. 

  342. 

  343. #if defined(HW_FSMC_STM32)
    344. 

  344. CREATE_HANDLER(FSMC,            FSMC,         NUT_IRQPRI_DEF);
    345. 

  345. #endif
    346. 

  346. 

  347. #if defined(HW_FMC_STM32)
    348. 

  348. CREATE_HANDLER(FMC,             FMC,          NUT_IRQPRI_DEF);
    349. 

  349. #endif
    350. 

  350. 

  351. #if defined(HW_COMP1_2_3_STM32)
    352. 

  352. CREATE_HANDLER(COMP1_2_3,       COMP1_2_3,    NUT_IRQPRI_DEF);
    353. 

  353. #endif
    354. 

  354. #if defined(HW_COMP4_5_6_STM32)
    355. 

  355. CREATE_HANDLER(COMP4_5_6,       COMP4_5_6,    NUT_IRQPRI_DEF);
    356. 

  356. #endif
    357. 

  357. #if defined(HW_COMP_STM32)
    358. 

  358. CREATE_HANDLER(COMP,            COMP,         NUT_IRQPRI_DEF);
    359. 

  359. #endif
    360. 

  360. #if defined(HW_COMP_ACQ_STM32)
    361. 

  361. CREATE_HANDLER(COMP_ACQ,        COMP_ACQ,     NUT_IRQPRI_DEF);
    362. 

  362. #endif
    363. 

  363. 

  364. #if defined(HW_CEC_STM32)
    365. 

  365. CREATE_HANDLER(CEC,             CEC,          NUT_IRQPRI_DEF);
    366. 

  366. #endif
    367. 

  367. 

  368. #if defined( __FPU_PRESENT)
    369. 

  369. CREATE_HANDLER(FPU,             FPU,          NUT_IRQPRI_DEF);
    370. 

  370. #endif
    371.