stm32_qenc32_0.c 5.2 KB

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  1. /*!
  2. * Copyright (C) 2013 Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de)
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*!
  35. * \file arch/cm3/dev/stm/stm32_qenc32_0.c
  36. * \brief STM 32 bit quadrature encoder device 0 using 32-bit timer.
  37. *
  38. * Implement a 32 bit quadrature encode with an STM32 32-bit timer. The
  39. * encoder runs on it's own and uses no interrupts.
  40. * Attention : Configured values for the used pins are not checked here!
  41. *
  42. * Typical usage:
  43. * \code
  44. * #include <arch/cm3/stm/stm32_qenc32_0.h>
  45. * stm32_qenc32_0_init();
  46. * ...
  47. * value = stm32_qenc32_0_get();
  48. * ...
  49. * \endcode
  50. *
  51. * \verbatim
  52. * $Id: stm32_qenc32_0.c 5638 2014-04-07 13:58:48Z u_bonnes $
  53. * \endverbatim
  54. */
  55. #include <cfg/arch.h>
  56. #include <arch/cm3/stm/stm32xxxx.h>
  57. #include <cfg/qenc.h>
  58. #include <dev/gpio.h>
  59. #include <arch/cm3/stm/stm32_gpio.h>
  60. #include <dev/hwtimer_stm32.h>
  61. /* Only compile code if needed defines are given*/
  62. #if defined(STM32_QENC32_0_I_PORT) && defined(STM32_QENC32_0_I_PIN) &&\
  63. defined(STM32_QENC32_0_Q_PORT) && defined(STM32_QENC32_0_Q_PIN) &&\
  64. defined(STM32_QENC32_0_TIMER_ID)
  65. #if defined(STM32_QENC32_0_I_PORT)
  66. #define STM32_QENC32_I_PORT STM32_QENC32_0_I_PORT
  67. #endif
  68. #if defined(STM32_QENC32_0_I_PIN)
  69. #define STM32_QENC32_I_PIN STM32_QENC32_0_I_PIN
  70. #endif
  71. #if defined(STM32_QENC32_0_Q_PORT)
  72. #define STM32_QENC32_Q_PORT STM32_QENC32_0_Q_PORT
  73. #endif
  74. #if defined(STM32_QENC32_0_Q_PIN)
  75. #define STM32_QENC32_Q_PIN STM32_QENC32_0_Q_PIN
  76. #endif
  77. #if defined(STM32_QENC32_0_INVERT)
  78. #define STM32_QENC32_INVERT STM32_QENC32_0_INVERT
  79. #endif
  80. #if defined(STM32_QENC32_0_TIMER_ID)
  81. #undef STM32TIMER_ID
  82. #define STM32TIMER_ID STM32_QENC32_0_TIMER_ID
  83. #include <arch/cm3/stm/stm32timertran.h>
  84. #define STM32_QENC32_BASE STM32TIMER_BASE
  85. #define STM32_QENC32_CLK() STM32TIMER_CLK()
  86. #define STM32_QENC32_RST() STM32TIMER_RST()
  87. #define STM32_QENC32_I_AF STM32TIMER_AF(STM32_QENC32_I_PORT, STM32_QENC32_I_PIN)
  88. #define STM32_QENC32_Q_AF STM32TIMER_AF(STM32_QENC32_Q_PORT, STM32_QENC32_Q_PIN)
  89. #endif
  90. /*!
  91. * \brief Initialize the quadrature encoder
  92. *
  93. * No checking is done here!
  94. *
  95. * \param None.
  96. *
  97. * \return None.
  98. */
  99. void stm32_qenc32_0_init(void)
  100. {
  101. STM32_QENC32_CLK();
  102. STM32_QENC32_RST();
  103. /* AN4013.pdf*/
  104. /* Select Input T1->TI1FP1, T2->TI2FP2*/
  105. /* Input polarity TI1FP1 non-inverted, TI1FP1=TI1, TI1FP2 non-inverted, TI1FP2= TI2*/
  106. /* Register reset already done by reset */
  107. /* Encoder mode 3*/
  108. #if defined(STM32_QENC32_0_INVERT)
  109. TIM_CCEnable(STM32_QENC32_BASE) = TIM_CCER_CC1P;
  110. #endif
  111. TIM_SlaveModeControl(STM32_QENC32_BASE)= TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0;
  112. TIM_AutoReloadValue(STM32_QENC32_BASE) = (uint32_t) -1;
  113. TIM_EventGeneration(STM32_QENC32_BASE) = TIM_EGR_UG;
  114. GpioPinConfigSet(STM32_QENC32_I_PORT, STM32_QENC32_I_PIN,
  115. GPIO_CFG_PULLDOWN | GPIO_CFG_PERIPHAL);
  116. GpioPinConfigSet(STM32_QENC32_Q_PORT, STM32_QENC32_Q_PIN,
  117. GPIO_CFG_PULLDOWN | GPIO_CFG_PERIPHAL);
  118. GPIO_PinAFConfig((GPIO_TypeDef*)STM32_QENC32_I_PORT, STM32_QENC32_I_PIN,
  119. STM32_QENC32_I_AF );
  120. GPIO_PinAFConfig((GPIO_TypeDef*)STM32_QENC32_Q_PORT, STM32_QENC32_Q_PIN,
  121. STM32_QENC32_Q_AF );
  122. TIM_StartTimer(STM32_QENC32_BASE);
  123. }
  124. /*!
  125. * \brief Return quadrature encoder value
  126. *
  127. * \param None.
  128. *
  129. * \return .
  130. */
  131. int32_t stm32_qenc32_0_get(void)
  132. {
  133. return TIM_Counter(STM32_QENC32_BASE);
  134. }
  135. /*!
  136. * \brief Set quadrature encoder value
  137. *
  138. * \param Value to set.
  139. *
  140. * \return None.
  141. */
  142. void stm32_qenc32_0_set(int32_t value)
  143. {
  144. TIM_StopTimer(STM32_QENC32_BASE);
  145. TIM_Counter(STM32_QENC32_BASE) = value;
  146. TIM_Update(STM32_QENC32_BASE);
  147. TIM_StartTimer(STM32_QENC32_BASE);
  148. }
  149. #endif