stm32_spi1.c 8.8 KB

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  1. /*
  2. * Copyright (C) 2010 by Ulrich Prinz (uprinz2@netscape.net)
  3. * Copyright (C) 2010 by Nikolaj Zamotaev. All rights reserved.
  4. * Copyright (C) 2014 by Uwe Bonnes(bon@elektron.ikp.physik.tu-darmstadt.de
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. *
  34. */
  35. /*
  36. * \verbatim
  37. * $Id: stm32_spi1.c 5716 2014-05-23 14:55:45Z u_bonnes $
  38. * \endverbatim
  39. */
  40. #include <cfg/arch.h>
  41. #include <sys/timer.h>
  42. #include <cfg/spi.h>
  43. #include <cfg/arch/gpio.h>
  44. #include <dev/spibus.h>
  45. #include <dev/gpio.h>
  46. #include <arch/cm3/stm/stm32_gpio.h>
  47. #include <arch/cm3/stm/stm32_dma.h>
  48. #include <arch/cm3/stm/stm32_spi.h>
  49. #include <dev/irqreg.h>
  50. #include <sys/event.h>
  51. #include <sys/nutdebug.h>
  52. #include <stdlib.h>
  53. #include <errno.h>
  54. /* Handle the PIN remap possibilities
  55. * F1: NSS: PA4/PA15
  56. * SCK: PA5/PB3
  57. * MISO: PA6/PB4
  58. * MOSI: PA7/PB5
  59. * L1: NSS: PA4/PA15/PE12
  60. * SCK: PA5/PB3/PE13
  61. * MISO: PA6/PA11/PB4/PE14
  62. * MOSI: PA7/PA12/PB5/PE15
  63. * F2/F30x/F4:
  64. * NSS: PA4/PA15
  65. * SCK: PA5/PB3
  66. * MISO: PA6/PB4
  67. * MOSI: PA7/PB5
  68. * F37X:
  69. * NSS: PA4/PA11/PA15/PC6
  70. * SCK: PA5/PA12/PB3/PC7
  71. * MISO: PA6/PA13/PB4/PC8
  72. * MOSI: PA7/PB5/PC9/PF6
  73. *
  74. * Use PA4 as default chip select
  75. */
  76. #if !defined( SPIBUS1_NO_CS)
  77. #if !defined(SPIBUS1_CS0_PORT) && !defined(SPIBUS1_CS0_PIN)
  78. #define SPIBUS_CS0_PORT NUTGPIO_PORTA
  79. #define SPIBUS_CS0_PIN 4
  80. #elif !defined(SPIBUS2_CS0_PORT) || !defined(SPIBUS2_CS0_PIN)
  81. #warning "SPIBUS1 uncomplete chip select"
  82. #else
  83. #define SPIBUS_CS0_PORT SPIBUS1_CS0_PORT
  84. #define SPIBUS_CS0_PIN SPIBUS1_CS0_PIN
  85. #endif
  86. #if defined(SPIBUS1_CS1_PORT)
  87. #define SPIBUS_CS1_PORT SPIBUS1_CS1_PORT
  88. #endif
  89. #if defined(SPIBUS1_CS2_PORT)
  90. #define SPIBUS_CS2_PORT SPIBUS1_CS2_PORT
  91. #endif
  92. #if defined(SPIBUS1_CS3_PORT)
  93. #define SPIBUS_CS3_PORT SPIBUS1_CS3_PORT
  94. #endif
  95. #if defined(SPIBUS1_CS1_PIN)
  96. #define SPIBUS_CS1_PIN SPIBUS1_CS1_PIN
  97. #endif
  98. #if defined(SPIBUS1_CS2_PIN)
  99. #define SPIBUS_CS2_PIN SPIBUS1_CS2_PIN
  100. #endif
  101. #if defined(PIBUS1_CS2_PIN)
  102. #define SPIBUS_CS3_PIN SPIBUS1_CS3_PIN
  103. #endif
  104. #endif
  105. #if defined(MCU_STM32F1)
  106. #if defined(SPIBUS3_REMAP_SPI)
  107. #define SPIBUS_REMAP_BB() CM3BBSET(AFIO_BASE, AFIO_TypeDef, MAPR, _BI32(AFIO_MAPR_SPI1_REMAP))
  108. #define SPIBUS_SCK_PIN 3
  109. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  110. #define SPIBUS_MISO_PIN 4
  111. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  112. #define SPIBUS_MOSI_PIN 5
  113. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  114. #else
  115. #define SPIBUS_REMAP_BB() CM3BBCLR(AFIO_BASE, AFIO_TypeDef, MAPR, _BI32(AFIO_MAPR_SPI1_REMAP))
  116. #define SPIBUS_SCK_PIN 5
  117. #define SPIBUS_SCK_PORT NUTGPIO_PORTA
  118. #define SPIBUS_MISO_PIN 6
  119. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  120. #define SPIBUS_MOSI_PIN 7
  121. #define SPIBUS_MOSI_PORT NUTGPIO_PORTA
  122. #endif
  123. #elif defined(MCU_STM32F37X)
  124. #if SPIBUS1_SCK_PIN == 5 || !defined(SPIBUS1_SCK_PIN)
  125. #define SPIBUS_SCK_PORT NUTGPIO_PORTA
  126. #define SPIBUS_SCK_PIN 5
  127. #elif SPIBUS1_SCK_PIN == 12
  128. #define SPIBUS_SCK_PORT NUTGPIO_PORTA
  129. #define SPIBUS_SCK_PIN 12
  130. #define SPI_SCK_GPIO_AF GPIO_AF_6
  131. #elif SPIBUS1_SCK_PIN == 3
  132. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  133. #define SPIBUS_SCK_PIN 3
  134. #elif SPIBUS1_SCK_PIN == 7
  135. #define SPIBUS_SCK_PORT NUTGPIO_PORTC
  136. #define SPIBUS_SCK_PIN 7
  137. #else
  138. #warning "Illegal STM32F373 SPI1 SCK assignment"
  139. #endif
  140. #if SPIBUS1_MISO_PIN == 6 || !defined(SPIBUS1_MISO_PIN)
  141. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  142. #define SPIBUS_MISO_PIN 6
  143. #elif SPIBUS1_MISO_PIN == 13
  144. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  145. #define SPIBUS_MISO_PIN 13
  146. #define SPI_MISO_GPIO_AF GPIO_AF_6
  147. #elif SPIBUS1_MISO_PIN == 4
  148. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  149. #define SPIBUS_MISO_PIN 4
  150. #elif SPIBUS1_MISO_PIN == 8
  151. #define SPIBUS_MISO_PORT NUTGPIO_PORTC
  152. #define SPIBUS_MISO_PIN 8
  153. #else
  154. #warning "Illegal STM32F373 SPI1 MISO assignment"
  155. #endif
  156. #if SPIBUS1_MOSI_PIN == 7 || !defined(SPIBUS1_MOSI_PIN)
  157. #define SPIBUS_MOSI_PORT NUTGPIO_PORTA
  158. #define SPIBUS_MOSI_PIN 7
  159. #elif SPIBUS1_MOSI_PIN == 5
  160. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  161. #define SPIBUS_MOSI_PIN 5
  162. #elif SPIBUS1_MOSI_PIN == 9
  163. #define SPIBUS_MOSI_PORT NUTGPIO_PORTC
  164. #define SPIBUS_MOSI_PIN 9
  165. #elif SPIBUS1_MOSI_PIN == 6
  166. #define SPIBUS_MOSI_PORT NUTGPIO_PORTF
  167. #define SPIBUS_MOSI_PIN 6
  168. #else
  169. #warning "Illegal STM32F373 SPI1 MOSI assignment"
  170. #endif
  171. #else
  172. #if !defined(SPIBUS1_SCK_PIN)
  173. #define SPIBUS_SCK_PIN 5
  174. #define SPIBUS_SCK_PORT NUTGPIO_PORTA
  175. #elif SPIBUS1_SCK_PIN == 5
  176. #define SPIBUS_SCK_PORT NUTGPIO_PORTA
  177. #elif SPIBUS1_SCK_PIN == 3
  178. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  179. #elif defined(MCU_STM32L1) && SPIBUS1_SCK_PIN == 13
  180. #define SPIBUS_SCK_PORT NUTGPIO_PORTE
  181. #else
  182. #warning "Illegal SPI1 SCK pin assignement"
  183. #endif
  184. #if !defined(SPIBUS1_MISO_PIN)
  185. #define SPIBUS_MISO_PIN 6
  186. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  187. #elif SPIBUS1_MISO_PIN == 6
  188. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  189. #elif SPIBUS1_MISO_PIN == 11
  190. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  191. #elif SPIBUS1_MISO_PIN == 4
  192. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  193. #elif defined(MCU_STM32L1) && SPIBUS1_MISO_PIN == 14
  194. #define SPIBUS_MISO_PORT NUTGPIO_PORTE
  195. #else
  196. #warning "Illegal SPI1 MISO pin assignement"
  197. #endif
  198. #if !defined(SPIBUS1_MOSI_PIN)
  199. #define SPIBUS_MOSI_PIN 7
  200. #define SPIBUS_MOSI_PORT NUTGPIO_PORTA
  201. #elif SPIBUS1_MOSI_PIN == 7
  202. #define SPIBUS_MOSI_PORT NUTGPIO_PORTA
  203. #elif SPIBUS1_MOSI_PIN == 12
  204. #define SPIBUS_MOSI_PORT NUTGPIO_PORTA
  205. #elif SPIBUS1_MOSI_PIN == 5
  206. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  207. #elif defined(MCU_STM32L1) && SSPIBUS1_MOSI_PIN == 15
  208. #define SPIBUS_MOSI_PORT NUTGPIO_PORTE
  209. #else
  210. #warning "Illegal SPI1 MOSI pin assignement"
  211. #endif
  212. #endif
  213. #define SPI_REMAP GPIO_Remap_SPI1
  214. #define SPI_GPIO_AF GPIO_AF_SPI1
  215. #define SPI_ENABLE_CLK_SET() CM3BBSET(RCC_BASE, RCC_TypeDef, APB2ENR, _BI32(RCC_APB2ENR_SPI1EN))
  216. #define SPI_ENABLE_CLK_GET() CM3BBGET(RCC_BASE, RCC_TypeDef, APB2ENR, _BI32(RCC_APB2ENR_SPI1EN))
  217. #define sig_SPI sig_SPI1
  218. #define SPI_BASE SPI1_BASE
  219. #if !defined(SPIBUS1_MODE)
  220. #define SPIBUS_MODE IRQ_MODE
  221. #else
  222. #define SPIBUS_MODE SPIBUS1_MODE
  223. #endif
  224. #if SPIBUS_MODE == DMA_MODE
  225. #if defined(SPIBUS1_DMA_TX_ALTERNATE_STREAM)
  226. #define SPI_DMA_TX_CHANNEL SPI1_TX_ALT_DMA
  227. #define sig_SPI_DMA_TX SPI1_TX_ALT_DMA_IRQ
  228. #else
  229. #define SPI_DMA_TX_CHANNEL SPI1_TX_DMA
  230. #define sig_SPI_DMA_TX SPI1_TX_DMA_IRQ
  231. #endif
  232. #if defined(SPIBUS1_DMA_RX_ALTERNATE_STREAM)
  233. #define SPI_DMA_RX_CHANNEL SPI1_RX_ALT_DMA
  234. #define sig_SPI_DMA_RX SPI1_RX_ALT_DMA_IRQ
  235. #else
  236. #define SPI_DMA_RX_CHANNEL SPI1_RX_DMA
  237. #define sig_SPI_DMA_RX SPI1_RX_DMA_IRQ
  238. #endif
  239. #endif
  240. NUTSPIBUS spiBus1Stm32 = {
  241. NULL, /*!< Bus mutex semaphore (bus_mutex). */
  242. NULL, /*!< Bus ready signal (bus_ready). */
  243. SPI1_BASE, /*!< Bus base address (bus_base). */
  244. NULL, /*!< Bus interrupt handler (bus_sig). */
  245. Stm32SpiBusNodeInit, /*!< Initialize the bus (bus_initnode). */
  246. Stm32SpiBusSelect, /*!< Select the specified device (bus_alloc). */
  247. Stm32SpiBusDeselect, /*!< Deselect the specified device (bus_release). */
  248. Stm32SpiBusTransfer,
  249. NutSpiBusWait,
  250. NutSpiBusSetMode, /*!< Set SPI mode of a specified device (bus_set_mode). */
  251. NutSpiBusSetRate, /*!< Set clock rate of a specified device (bus_set_rate). */
  252. NutSpiBusSetBits /*!< Set number of data bits of a specified device (bus_set_bits). */
  253. };
  254. #include "stm32_spi.c"