stm32_spi3.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240
  1. /*
  2. * Copyright (C) 2010 by Ulrich Prinz (uprinz2@netscape.net)
  3. * Copyright (C) 2010 by Nikolaj Zamotaev. All rights reserved.
  4. * Copyright (C) 2014 by Uwe Bonnes(bon@elektron.ikp.physik.tu-darmstadt.de
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. *
  34. */
  35. /*
  36. * \verbatim
  37. * $Id: stm32_spi3.c 5716 2014-05-23 14:55:45Z u_bonnes $
  38. * \endverbatim
  39. */
  40. #include <arch/cm3.h>
  41. #include <sys/timer.h>
  42. #include <cfg/spi.h>
  43. #include <cfg/arch/gpio.h>
  44. #include <dev/spibus.h>
  45. #include <dev/gpio.h>
  46. #include <arch/cm3/stm/stm32_gpio.h>
  47. #if defined(MCU_STM32F1)
  48. #include <arch/cm3/stm/stm32f1_dma.h>
  49. #endif
  50. #include <arch/cm3/stm/stm32_spi.h>
  51. #include <dev/irqreg.h>
  52. #include <sys/event.h>
  53. #include <sys/nutdebug.h>
  54. #include <stdlib.h>
  55. #include <errno.h>
  56. /* Handle the PIN remap possibilities
  57. * F1_CL/F2/F3/F4
  58. * NSS: PA15/PA4
  59. * SCK: PB3/PC10
  60. * MISO: PB4/PC11
  61. * MOSI: PB5/PC12
  62. * No SPI3 on L1, for F1 only STM32F10X_CL can remap
  63. *
  64. * Use PA15 as default chip select
  65. */
  66. #if !defined( SPIBUS3_NO_CS)
  67. #if !defined(SPIBUS3_CS0_PORT) && !defined(SPIBUS3_CS0_PIN)
  68. #define SPIBUS_CS0_PORT NUTGPIO_PORTA
  69. #define SPIBUS_CS0_PIN 15
  70. #elif !defined(SPIBUS3_CS0_PORT) || !defined(SPIBUS3_CS0_PIN)
  71. #warnig "SPIBUS3 uncomplete chip select"
  72. #else
  73. #define SPIBUS_CS0_PORT SPIBUS3_CS0_PORT
  74. #define SPIBUS_CS0_PIN SPIBUS3_CS0_PIN
  75. #endif
  76. #endif
  77. #if defined(SPIBUS3_CS1_PORT)
  78. #define SPIBUS_CS1_PORT SPIBUS3_CS1_PORT
  79. #endif
  80. #if defined(SPIBUS3_CS2_PORT)
  81. #define SPIBUS_CS2_PORT SPIBUS3_CS2_PORT
  82. #endif
  83. #if defined(SPIBUS3_CS3_PORT)
  84. #define SPIBUS_CS3_PORT SPIBUS3_CS3_PORT
  85. #endif
  86. #if defined(SPIBUS3_CS1_PIN)
  87. #define SPIBUS_CS1_PIN SPIBUS3_CS1_PIN
  88. #endif
  89. #if defined(SPIBUS3_CS2_PIN)
  90. #define SPIBUS_CS2_PIN SPIBUS3_CS2_PIN
  91. #endif
  92. #if defined(PIBUS3_CS2_PIN)
  93. #define SPIBUS_CS3_PIN SPIBUS3_CS3_PIN
  94. #endif
  95. #if defined(MCU_STM32F1)
  96. #if defined(STM32F10X_CL) && defined(SPIBUS3_REMAP_SPI)
  97. #define SPIBUS_REMAP_BB() CM3BBSET(AFIO_BASE, AFIO_TypeDef, MAPR, _BI32(AFIO_MAPR_SPI3_REMAP))
  98. #define SPIBUS_SCK_PIN 10
  99. #define SPIBUS_SCK_PORT NUTGPIO_PORTC
  100. #define SPIBUS_MISO_PIN 11
  101. #define SPIBUS_MISO_PORT NUTGPIO_PORTC
  102. #define SPIBUS_MOSI_PIN 12
  103. #define SPIBUS_MOSI_PORT NUTGPIO_PORTC
  104. #else
  105. #if defined(STM32F10X_CL) && defined(SPIBUS3_REMAP_SPI)
  106. #define SPIBUS_REMAP_BB() CM3BBCLR(AFIO_BASE, AFIO_TypeDef, MAPR, _BI32(AFIO_MAPR_SPI3_REMAP))
  107. #endif
  108. #define SPIBUS_SCK_PIN 3
  109. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  110. #define SPIBUS_MISO_PIN 4
  111. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  112. #define SPIBUS_MOSI_PIN 5
  113. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  114. #endif
  115. #elif defined(MCU_STM32F37X)
  116. #if SPIBUS3_SCK_PIN == 1 || !defined(SPIBUS3_SCK_PIN )
  117. #define SPIBUS_SCK_PIN 1
  118. #define SPIBUS_SCK_PORT NUTGPIO_PORTA
  119. #elif SPIBUS3_SCK_PIN == 3
  120. #define SPIBUS_SCK_PIN 3
  121. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  122. #elif SPIBUS3_SCK_PIN == 10
  123. #define SPIBUS_SCK_PIN 10
  124. #define SPIBUS_SCK_PORT NUTGPIO_PORTC
  125. #else
  126. #warning "Illegal STM32F373 SPI3 SCK assignment"
  127. #endif
  128. #if SPIBUS3_MOSI_PIN == 3 || !defined(SPIBUS3_MOSI_PIN )
  129. #define SPIBUS_MOSI_PIN 3
  130. #define SPIBUS_MOSI_PORT NUTGPIO_PORTA
  131. #elif SPIBUS3_MOSI_PIN == 5
  132. #define SPIBUS_MOSI_PIN 5
  133. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  134. #elif SPIBUS3_MOSI_PIN == 12
  135. #define SPIBUS_MOSI_PIN 12
  136. #define SPIBUS_MOSI_PORT NUTGPIO_PORTC
  137. #else
  138. #warning "Illegal STM32F373 SPI3 MOSI assignment"
  139. #endif
  140. #if SPIBUS3_MISO_PIN == 2 || !defined(SPIBUS3_MISO_PIN )
  141. #define SPIBUS_MISO_PIN 2
  142. #define SPIBUS_MISO_PORT NUTGPIO_PORTA
  143. #elif SPIBUS3_MISO_PIN == 4
  144. #define SPIBUS_MISO_PIN 4
  145. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  146. #elif SPIBUS3_MISO_PIN == 12
  147. #define SPIBUS_MISO_PIN 12
  148. #define SPIBUS_MISO_PORT NUTGPIO_PORTC
  149. #else
  150. #warning "Illegal STM32F373 SPI3 MISO assignment"
  151. #endif
  152. #elif defined(MCU_STM32L1) || defined(MCU_STM32F2) || defined(MCU_STM32F3)|| defined(MCU_STM32F4 )
  153. #if !defined(SPIBUS3_SCK_PIN)
  154. #define SPIBUS_SCK_PIN 3
  155. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  156. #elif SPIBUS3_SCK_PIN == 3
  157. #define SPIBUS_SCK_PORT NUTGPIO_PORTB
  158. #elif SPIBUS3_SCK_PIN == 10
  159. #define SPIBUS_SCK_PORT NUTGPIO_PORTC
  160. #else
  161. #warning "Illegal SPI3 SCK pin assignement"
  162. #endif
  163. #if !defined(SPIBUS3_MISO_PIN)
  164. #define SPIBUS_MISO_PIN 4
  165. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  166. #elif SPIBUS3_MISO_PIN == 4
  167. #define SPIBUS_MISO_PORT NUTGPIO_PORTB
  168. #elif SPIBUS3_MISO_PIN == 11
  169. #define SPIBUS_MISO_PORT NUTGPIO_PORTC
  170. #else
  171. #warning "Illegal SPI3 MISO pin assignement"
  172. #endif
  173. #if !defined(SPIBUS3_MOSI_PIN)
  174. #define SPIBUS_MOSI_PIN 5
  175. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  176. #elif SPIBUS3_MOSI_PIN == 5
  177. #define SPIBUS_MOSI_PORT NUTGPIO_PORTB
  178. #elif SPIBUS3_MOSI_PIN == 12
  179. #define SPIBUS_MOSI_PORT NUTGPIO_PORTC
  180. #else
  181. #warning "Illegal SPI3 MOSI pin assignement"
  182. #endif
  183. #endif
  184. #define SPI_DEV 3
  185. #define SPI_GPIO_AF GPIO_AF_SPI3
  186. #define SPI_ENABLE_CLK_SET() CM3BBSET(RCC_BASE, RCC_TypeDef, APB1ENR, _BI32(RCC_APB1ENR_SPI3EN))
  187. #define SPI_ENABLE_CLK_GET() CM3BBGET(RCC_BASE, RCC_TypeDef, APB1ENR, _BI32(RCC_APB1ENR_SPI3EN))
  188. #define sig_SPI sig_SPI3
  189. #define SPI_BASE SPI3_BASE
  190. #if !defined(SPIBUS3_MODE)
  191. #define SPIBUS_MODE IRQ_MODE
  192. #else
  193. #define SPIBUS_MODE SPIBUS3_MODE
  194. #endif
  195. #if SPIBUS_MODE == DMA_MODE
  196. #if defined(SPIBUS3_DMA_TX_ALTERNATE_STREAM)
  197. #define SPI_DMA_TX_CHANNEL SPI3_TX_ALT_DMA
  198. #define sig_SPI_DMA_TX SPI3_TX_ALT_DMA_IRQ
  199. #else
  200. #define SPI_DMA_TX_CHANNEL SPI3_TX_DMA
  201. #define sig_SPI_DMA_TX SPI3_TX_DMA_IRQ
  202. #endif
  203. #if defined(SPIBUS1_DMA_RX_ALTERNATE_STREAM)
  204. #define SPI_DMA_RX_CHANNEL SPI3_RX_ALT_DMA
  205. #define sig_SPI_DMA_RX SPI3_RX_ALT_DMA_IRQ
  206. #else
  207. #define SPI_DMA_RX_CHANNEL SPI3_RX_DMA
  208. #define sig_SPI_DMA_RX SPI3_RX_DMA_IRQ
  209. #endif
  210. #endif
  211. NUTSPIBUS spiBus3Stm32 = {
  212. NULL, /*!< Bus mutex semaphore (bus_mutex). */
  213. NULL, /*!< Bus ready signal (bus_ready). */
  214. SPI3_BASE, /*!< Bus base address (bus_base). */
  215. NULL, /*!< Bus interrupt handler (bus_sig). */
  216. Stm32SpiBusNodeInit, /*!< Initialize the bus (bus_initnode). */
  217. Stm32SpiBusSelect, /*!< Select the specified device (bus_alloc). */
  218. Stm32SpiBusDeselect, /*!< Deselect the specified device (bus_release). */
  219. Stm32SpiBusTransfer,
  220. NutSpiBusWait,
  221. NutSpiBusSetMode, /*!< Set SPI mode of a specified device (bus_set_mode). */
  222. NutSpiBusSetRate, /*!< Set clock rate of a specified device (bus_set_rate). */
  223. NutSpiBusSetBits /*!< Set number of data bits of a specified device (bus_set_bits). */
  224. };
  225. #include "stm32_spi.c"