stm32_spi4.c 5.4 KB

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  1. /*
  2. * Copyright (C) 2010 by Ulrich Prinz (uprinz2@netscape.net)
  3. * Copyright (C) 2010 by Nikolaj Zamotaev. All rights reserved.
  4. * Copyright (C) 2014 by Uwe Bonnes.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. *
  34. */
  35. /*
  36. * \verbatim
  37. * $Id: stm32_spi4.c 5716 2014-05-23 14:55:45Z u_bonnes $
  38. * \endverbatim
  39. */
  40. #include <arch/cm3.h>
  41. #include <sys/timer.h>
  42. #include <cfg/spi.h>
  43. #include <cfg/arch/gpio.h>
  44. #include <dev/spibus.h>
  45. #include <dev/gpio.h>
  46. #include <arch/cm3/stm/stm32_gpio.h>
  47. #include <arch/cm3/stm/stm32_spi.h>
  48. #include <dev/irqreg.h>
  49. #include <sys/event.h>
  50. #include <sys/nutdebug.h>
  51. #include <stdlib.h>
  52. #include <errno.h>
  53. /* Handle the PIN remap possibilities
  54. * F4
  55. * NSS: PE4/PE11
  56. * SCK: PE2/PE12
  57. * MISO: PE5/PE13
  58. * MOSI: PE6/PE14
  59. *
  60. * For Chip select, we use NSS pin as default or any other pin as pure GPIO
  61. *
  62. * Use PE4 as default chip select
  63. */
  64. #if !defined( SPIBUS4_NO_CS)
  65. #if !defined(SPIBUS4_CS0_PORT) && !defined(SPIBUS4_CS0_PIN)
  66. #define SPIBUS_CS0_PORT NUTGPIO_PORTE
  67. #define SPIBUS_CS0_PIN 4
  68. #elif !defined(SPIBUS4_CS0_PORT) || !defined(SPIBUS4_CS0_PIN)
  69. #warnig "SPIBUS4 uncomplete chip select"
  70. #else
  71. #define SPIBUS_CS0_PORT SPIBUS4_CS0_PORT
  72. #define SPIBUS_CS0_PIN SPIBUS4_CS0_PIN
  73. #endif
  74. #if defined(SPIBUS4_CS1_PORT)
  75. #define SPIBUS_CS1_PORT SPIBUS4_CS1_PORT
  76. #endif
  77. #if defined(SPIBUS4_CS2_PORT)
  78. #define SPIBUS_CS2_PORT SPIBUS4_CS2_PORT
  79. #endif
  80. #if defined(SPIBUS4_CS3_PORT)
  81. #define SPIBUS_CS3_PORT SPIBUS4_CS3_PORT
  82. #endif
  83. #if defined(SPIBUS4_CS1_PIN)
  84. #define SPIBUS_CS1_PIN SPIBUS4_CS1_PIN
  85. #endif
  86. #if defined(SPIBUS4_CS2_PIN)
  87. #define SPIBUS_CS2_PIN SPIBUS4_CS2_PIN
  88. #endif
  89. #if defined(PIBUS4_CS2_PIN)
  90. #define SPIBUS_CS3_PIN SPIBUS4_CS3_PIN
  91. #endif
  92. #endif
  93. #if SPIBUS4_SCK_PIN == 12
  94. #define SPIBUS_SCK_PIN 12
  95. #else
  96. #define SPIBUS_SCK_PIN 2
  97. #endif
  98. #if SPIBUS4_MISO_PIN == 13
  99. #define SPIBUS_MISO_PIN 13
  100. #else
  101. #define SPIBUS_MISO_PIN 5
  102. #endif
  103. #if SPIBUS4_MOSI_PIN == 14
  104. #define SPIBUS_MOSI_PIN 14
  105. #else
  106. #define SPIBUS_MOSI_PIN 6
  107. #endif
  108. #define SPIBUS_SCK_PORT NUTGPIO_PORTE
  109. #define SPIBUS_MISO_PORT NUTGPIO_PORTE
  110. #define SPIBUS_MOSI_PORT NUTGPIO_PORTE
  111. #define SPI_GPIO_AF GPIO_AF_SPI4
  112. #define SPI_ENABLE_CLK_SET() CM3BBSET(RCC_BASE, RCC_TypeDef, APB2ENR, _BI32(RCC_APB2ENR_SPI4EN))
  113. #define SPI_ENABLE_CLK_GET() CM3BBGET(RCC_BASE, RCC_TypeDef, APB2ENR, _BI32(RCC_APB2ENR_SPI4EN))
  114. #define sig_SPI sig_SPI4
  115. #define SPI_BASE SPI4_BASE
  116. #if !defined(SPIBUS4_MODE)
  117. #define SPIBUS_MODE IRQ_MODE
  118. #else
  119. #define SPIBUS_MODE SPIBUS4_MODE
  120. #endif
  121. #if SPIBUS_MODE == DMA_MODE
  122. #if defined(SPIBUS1_DMA_TX_ALTERNATE_STREAM)
  123. #define SPI_DMA_TX_CHANNEL SPI4_TX_ALT_DMA
  124. #define sig_SPI_DMA_TX SPI4_TX_ALT_DMA_IRQ
  125. #else
  126. #define SPI_DMA_TX_CHANNEL SPI4_TX_DMA
  127. #define sig_SPI_DMA_TX SPI4_TX_DMA_IRQ
  128. #endif
  129. #if defined(SPIBUS1_DMA_RX_ALTERNATE_STREAM)
  130. #define SPI_DMA_RX_CHANNEL SPI4_RX_ALT_DMA
  131. #define sig_SPI_DMA_RX SPI4_RX_ALT_DMA_IRQ
  132. #else
  133. #define SPI_DMA_RX_CHANNEL SPI4_RX_DMA
  134. #define sig_SPI_DMA_RX SPI4_RX_DMA_IRQ
  135. #endif
  136. #endif
  137. NUTSPIBUS spiBus4Stm32 = {
  138. NULL, /*!< Bus mutex semaphore (bus_mutex). */
  139. NULL, /*!< Bus ready signal (bus_ready). */
  140. SPI4_BASE, /*!< Bus base address (bus_base). */
  141. NULL, /*!< Bus interrupt handler (bus_sig). */
  142. Stm32SpiBusNodeInit, /*!< Initialize the bus (bus_initnode). */
  143. Stm32SpiBusSelect, /*!< Select the specified device (bus_alloc). */
  144. Stm32SpiBusDeselect, /*!< Deselect the specified device (bus_release). */
  145. Stm32SpiBusTransfer,
  146. NutSpiBusWait,
  147. NutSpiBusSetMode, /*!< Set SPI mode of a specified device (bus_set_mode). */
  148. NutSpiBusSetRate, /*!< Set clock rate of a specified device (bus_set_rate). */
  149. NutSpiBusSetBits /*!< Set number of data bits of a specified device (bus_set_bits). */
  150. };
  151. #include "stm32_spi.c"