ih_mcf51cn_common.c 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102
  1. /*
  2. * Copyright 2012 by Embedded Technologies s.r.o
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. */
  32. #include <arch/m68k.h>
  33. #include <dev/irqreg.h>
  34. #include <sys/atom.h>
  35. /*!
  36. * \brief Common interrupt control.
  37. *
  38. * \param cmd Control command.
  39. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  40. * - NUT_IRQCTL_STATUS Query interrupt status.
  41. * - NUT_IRQCTL_ENABLE Enable interrupt.
  42. * - NUT_IRQCTL_DISABLE Disable interrupt.
  43. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  44. * \param param Pointer to optional parameter.
  45. *
  46. * \return 0 on success, -1 otherwise.
  47. */
  48. int IrqCtlCommon(IRQ_HANDLER *sig_handler, int cmd, void *param, volatile uint8_t *reg_imr, uint8_t imr_mask)
  49. {
  50. int rc = 0;
  51. unsigned int *ival = (unsigned int *) param;
  52. uint8_t enabled = *reg_imr & imr_mask;
  53. /*
  54. * Disable interrupt.
  55. */
  56. if (enabled) {
  57. PREVENT_SPURIOUS_INTERRUPT(*reg_imr |= imr_mask);
  58. }
  59. /*
  60. * Process command.
  61. */
  62. switch (cmd) {
  63. case NUT_IRQCTL_INIT:
  64. enabled = 0; /* Make sure the interrupt is disabled */
  65. break;
  66. case NUT_IRQCTL_STATUS:
  67. if (enabled) {
  68. *ival |= 1;
  69. } else {
  70. *ival &= ~1;
  71. }
  72. break;
  73. case NUT_IRQCTL_ENABLE:
  74. enabled = 1;
  75. break;
  76. case NUT_IRQCTL_DISABLE:
  77. enabled = 0;
  78. break;
  79. #ifdef NUT_PERFMON
  80. case NUT_IRQCTL_GETCOUNT:
  81. *ival = (unsigned int)sig_handler->ir_count;
  82. sig_handler->ir_count = 0;
  83. break;
  84. #endif
  85. default:
  86. rc = -1;
  87. break;
  88. }
  89. /*
  90. * Enable interrupt.
  91. */
  92. if (enabled) {
  93. PREVENT_SPURIOUS_INTERRUPT(*reg_imr &= ~imr_mask);
  94. }
  95. return rc;
  96. }