startup.s 1.7 KB

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  1. /* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
  2. .equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
  3. .equ NO_IRQ, 0x80 /* mask to disable IRQ */
  4. .equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
  5. .equ NO_FIQ, 0x40 /* mask to disable FIQ */
  6. .equ NO_INT, (NO_IRQ | NO_FIQ) /*mask to disable IRQ and FIQ */
  7. .equ USR_MODE, 0x10
  8. .equ FIQ_MODE, 0x11
  9. .equ IRQ_MODE, 0x12
  10. .equ SVC_MODE, 0x13
  11. .equ ABT_MODE, 0x17
  12. .equ UND_MODE, 0x1B
  13. .equ SYS_MODE, 0x1F
  14. /*****************************************************************************
  15. * The starupt code must be linked at the start of ROM, which is NOT
  16. * necessarily address zero.
  17. */
  18. .text
  19. .code 32
  20. .global _start
  21. .func _start
  22. _start:
  23. _reset:
  24. /* Relocate .fastcode section (copy from ROM to RAM) */
  25. LDR r0,=__fastcode_load
  26. LDR r1,=__fastcode_start
  27. LDR r2,=__fastcode_end
  28. 1:
  29. CMP r1,r2
  30. LDMLTIA r0!,{r3}
  31. STMLTIA r1!,{r3}
  32. BLT 1b
  33. /* Clear the .bss section (zero init) */
  34. LDR r1,=__bss_start__
  35. LDR r2,=__bss_end__
  36. MOV r3,#0
  37. 1:
  38. CMP r1,r2
  39. STMLTIA r1!,{r3}
  40. BLT 1b
  41. /* Initialize stack pointers for all ARM modes */
  42. MSR CPSR_c,#(SYS_MODE | I_BIT | F_BIT)
  43. LDR sp,=__c_stack_top__ /* set the C stack pointer */
  44. /* Enter the C/C++ code */
  45. LDR r12,=main
  46. MOV lr,pc /* set the return address */
  47. BX r12 /* the target code can be ARM or THUMB */
  48. .size _start, . - _start
  49. .endfunc
  50. .end