at91.h 6.6 KB

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  1. #ifndef _ARCH_ARM_AT91_H_
  2. #define _ARCH_ARM_AT91_H_
  3. /*
  4. * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*!
  35. * \file arch/arm/at91.h
  36. * \brief AT91 peripherals.
  37. *
  38. * \verbatim
  39. *
  40. * $Log$
  41. * Revision 1.14 2009/02/17 09:31:41 haraldkipp
  42. * Use more general macros. Added definition for NUT_HWCLK_PERIPHERAL for
  43. * targets which have a PMC MDIV flag.
  44. *
  45. * Revision 1.13 2008/08/06 12:51:10 haraldkipp
  46. * Added support for Ethernut 5 (AT91SAM9XE reference design).
  47. *
  48. * Revision 1.12 2008/02/15 16:59:42 haraldkipp
  49. * Spport for AT91SAM7SE512 added.
  50. *
  51. * Revision 1.11 2007/10/04 20:25:26 olereinhardt
  52. * Support for SAM7S256 added
  53. *
  54. * Revision 1.10 2006/08/31 19:04:08 haraldkipp
  55. * Added support for the AT91SAM9260 and Atmel's AT91SAM9260 Evaluation Kit.
  56. *
  57. * Revision 1.9 2006/08/01 07:35:59 haraldkipp
  58. * Exclude function prototypes when included by assembler.
  59. *
  60. * Revision 1.8 2006/07/05 07:45:25 haraldkipp
  61. * Split on-chip interface definitions.
  62. *
  63. * Revision 1.7 2006/06/28 17:22:34 haraldkipp
  64. * Make it compile for AT91SAM7X256.
  65. *
  66. * Revision 1.6 2006/05/25 09:09:57 haraldkipp
  67. * API documentation updated and corrected.
  68. *
  69. * Revision 1.5 2006/04/07 12:57:00 haraldkipp
  70. * Fast interrupt doesn't require to store R8-R12.
  71. *
  72. * Revision 1.4 2006/03/02 20:02:56 haraldkipp
  73. * Added ICCARM interrupt entry code. Probably not working, because I
  74. * excluded an immediate load.
  75. *
  76. * Revision 1.3 2006/01/05 16:52:49 haraldkipp
  77. * Baudrate calculation is now based on NutGetCpuClock().
  78. * The AT91_US_BAUD macro had been marked deprecated.
  79. *
  80. * Revision 1.2 2005/11/20 14:44:14 haraldkipp
  81. * Register offsets added.
  82. *
  83. * Revision 1.1 2005/10/24 10:31:13 haraldkipp
  84. * Moved from parent directory.
  85. *
  86. *
  87. * \endverbatim
  88. */
  89. #if defined (MCU_AT91R40008)
  90. #include <arch/arm/atmel/at91x40.h>
  91. #elif defined (MCU_AT91SAM7X)
  92. #include <arch/arm/atmel/at91sam7x.h>
  93. #elif defined (MCU_AT91SAM7S)
  94. #include <arch/arm/atmel/at91sam7s.h>
  95. #elif defined (MCU_AT91SAM7SE)
  96. #include <arch/arm/atmel/at91sam7se.h>
  97. #elif defined (MCU_AT91SAM9260)
  98. #include <arch/arm/atmel/at91sam9260.h>
  99. #elif defined (MCU_AT91SAM9G45)
  100. #include <arch/arm/atmel/at91sam9g45.h>
  101. #elif defined(MCU_AT91SAM9XE)
  102. #include <arch/arm/atmel/at91sam9xe.h>
  103. #endif
  104. #if defined(PMC_HAS_MDIV)
  105. /* If the power management controller has a master clock divider, then
  106. the peripherals may run on a slower clock than the CPU. In this case
  107. set the peripheral clock index to 1. If NUT_HWCLK_PERIPHERAL is not
  108. defined, it will be set in sys/timer.h to NUT_HWCLK_CPU, which is 0. */
  109. #define NUT_HWCLK_PERIPHERAL 1
  110. #endif
  111. /*! \addtogroup xgNutArchArmAt91 */
  112. /*@{*/
  113. #ifdef __GNUC__
  114. /*!
  115. * \brief Interrupt entry.
  116. */
  117. #define IRQ_ENTRY() \
  118. asm volatile("sub lr, lr,#4" "\n\t" /* Adjust LR */ \
  119. "stmfd sp!,{r0-r12,lr}" "\n\t" /* Save registers on IRQ stack. */ \
  120. "mrs r1, spsr" "\n\t" /* Save SPSR */ \
  121. "stmfd sp!,{r1}" "\n\t") /* */
  122. /*!
  123. * \brief Interrupt exit.
  124. */
  125. #define IRQ_EXIT() \
  126. asm volatile("ldmfd sp!, {r1}" "\n\t" /* Restore SPSR */ \
  127. "msr spsr_c, r1" "\n\t" /* */ \
  128. "ldr r0, =0xFFFFF000" "\n\t" /* End of interrupt. */ \
  129. "str r0, [r0, #0x130]" "\n\t" /* */ \
  130. "ldmfd sp!, {r0-r12, pc}^" "\n\t") /* Restore registers and return. */
  131. /*!
  132. * \brief Fast interrupt entry.
  133. */
  134. #define FIQ_ENTRY() \
  135. asm volatile("sub lr, lr,#4" "\n\t" /* Adjust LR */ \
  136. "stmfd sp!,{r0-r7,lr}" "\n\t" /* Save registers on IRQ stack. */ \
  137. "mrs r1, spsr" "\n\t" /* Save SPSR */ \
  138. "stmfd sp!,{r1}" "\n\t") /* */
  139. /*!
  140. * \brief Fast interrupt exit.
  141. */
  142. #define FIQ_EXIT() \
  143. asm volatile("ldmfd sp!, {r1}" "\n\t" /* Restore SPSR */ \
  144. "msr spsr_c, r1" "\n\t" /* */ \
  145. "ldr r0, =0xFFFFF000" "\n\t" /* End of interrupt. */ \
  146. "str r0, [r0, #0x130]" "\n\t" /* */ \
  147. "ldmfd sp!, {r0-r7, pc}^" "\n\t") /* Restore registers and return. */
  148. #else /* __IMAGECRAFT__ */
  149. #define IRQ_ENTRY() \
  150. asm("sub lr, lr,#4\n" \
  151. "stmfd sp!,{r0-r12,lr}\n" \
  152. "mrs r1, spsr\n" \
  153. "stmfd sp!,{r1}\n")
  154. #define IRQ_EXIT() \
  155. asm("ldmfd sp!, {r1}\n" \
  156. "msr spsr_c, r1\n" \
  157. ";ldr r0, =0xFFFFF000\n" /* ICCARM: FIXME! */ \
  158. "str r0, [r0, #0x130]\n" \
  159. "ldmfd sp!, {r0-r12, pc}^")
  160. #define FIQ_ENTRY() \
  161. asm("sub lr, lr,#4\n" \
  162. "stmfd sp!,{r0-r7,lr}\n" \
  163. "mrs r1, spsr\n" \
  164. "stmfd sp!,{r1}\n")
  165. #define FIQ_EXIT() \
  166. asm("ldmfd sp!, {r1}\n" \
  167. "msr spsr_c, r1\n" \
  168. ";ldr r0, =0xFFFFF000\n" /* ICCARM: FIXME! */ \
  169. "str r0, [r0, #0x130]\n" \
  170. "ldmfd sp!, {r0-r7, pc}^")
  171. #endif
  172. /*@} xgNutArchArmAt91 */
  173. #ifndef __ASSEMBLER__
  174. extern void McuInit(void);
  175. #endif
  176. #endif /* _ARCH_ARM_AT91_H_ */