lpc177x_8x_mci.h 15 KB

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  1. #ifndef _LPC177X_8X_MCI_H_
  2. #define _LPC177X_8X_MCI_H_
  3. /*
  4. * Copyright (C) 2012 by Rob van Lieshout (info@pragmalab.nl)
  5. * Copyright (C) 2012 by Ole Reinhardt (ole.reinhardt@embedded-it.de)
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. *
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions and the following disclaimer.
  13. * 2. Redistributions in binary form must reproduce the above copyright
  14. * notice, this list of conditions and the following disclaimer in the
  15. * documentation and/or other materials provided with the distribution.
  16. * 3. Neither the name of the copyright holders nor the names of
  17. * contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  23. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  24. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  25. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  26. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  27. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  28. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  30. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31. * SUCH DAMAGE.
  32. *
  33. * For additional information see http://www.ethernut.de/
  34. *
  35. **************************************************************************
  36. *
  37. * Parts taken from lpc177x_8x_mci.h 2011-06-02
  38. *
  39. * file lpc177x_8x_mci.h
  40. * brief Contains all macro definitions and function prototypes
  41. * support for MCI firmware library on LPC177x_8x
  42. * version 2.0
  43. * date 29. June. 2011
  44. * author NXP MCU SW Application Team
  45. *
  46. * Copyright(C) 2011, NXP Semiconductor
  47. * All rights reserved.
  48. *
  49. ***********************************************************************
  50. * Software that is described herein is for illustrative purposes only
  51. * which provides customers with programming information regarding the
  52. * products. This software is supplied "AS IS" without any warranties.
  53. * NXP Semiconductors assumes no responsibility or liability for the
  54. * use of the software, conveys no license or title under any patent,
  55. * copyright, or mask work right to the product. NXP Semiconductors
  56. * reserves the right to make changes in the software without
  57. * notification. NXP Semiconductors also make no representation or
  58. * warranty that such application will be suitable for the specified
  59. * use without further testing or modification.
  60. * Permission to use, copy, modify, and distribute this software and its
  61. * documentation is hereby granted, under NXP Semiconductors'
  62. * relevant copyright in the software, without fee, provided that it
  63. * is used in conjunction with NXP Semiconductors microcontrollers. This
  64. * copyright, permission, and disclaimer notice must appear in all copies of
  65. * this code.
  66. **********************************************************************/
  67. /* Peripheral group ----------------------------------------------------------- */
  68. #include <cfg/arch.h>
  69. /*----------------------------------------------------------------------------*
  70. MCI Public Macros
  71. *----------------------------------------------------------------------------*/
  72. //#define MCI_DMA_ENABLED (1)
  73. #define HIGH_LVL (1)
  74. #define LOW_LVL (0)
  75. /*----------------------------------------------------------------------------*
  76. SD/MMC Command list, per MMC spec. SD Memory Card Spec. Simplified version
  77. *----------------------------------------------------------------------------*/
  78. #define CMD0_GO_IDLE_STATE 0 /* GO_IDLE_STATE(MMC) or RESET(SD) */
  79. #define CMD1_SEND_OP_COND 1 /* SEND_OP_COND(MMC) or ACMD41(SD) */
  80. #define CMD2_ALL_SEND_CID 2 /* ALL_SEND_CID */
  81. #define CMD3_SET_RELATIVE_ADDR 3 /* SET_RELATE_ADDR */
  82. #define ACMD6_SET_BUS_WIDTH 6 /* Set Bus-Width 1 bit or 4 bits */
  83. #define CMD7_SELECT_CARD 7 /* SELECT/DESELECT_CARD */
  84. #define CMD8_SEND_IF_COND 8 /* Sending interface condition cmd */
  85. #define CMD9_SEND_CSD 9 /* SEND_CSD */
  86. #define CMD12_STOP_TRANSMISSION 12 /* Stop either READ or WRITE operation */
  87. #define CMD13_SEND_STATUS 13 /* SEND_STATUS */
  88. #define CMD16_SET_BLOCK_LEN 16 /* SET_BLOCK_LEN */
  89. #define CMD17_READ_SINGLE_BLOCK 17 /* SET_BLOCK_LEN */
  90. #define CMD18_READ_MULTIPLE_BLOCK 18 /* READ_MULTIPLE_BLOCK */
  91. #define CMD24_WRITE_BLOCK 24 /* WRITE_BLOCK */
  92. #define CMD25_WRITE_MULTIPLE_BLOCK 25 /* WRITE_MULTIPLE_BLOCK */
  93. #define CMD32_ERASE_WR_BLK_START 32 /* Start erase block number */
  94. #define CMD33_ERASE_WR_BLK_END 33 /* End erase block number */
  95. #define CMD38_ERASE 38 /* Start erase */
  96. #define ACMD41_SEND_APP_OP_COND 41 /* ACMD41 for SD card */
  97. #define CMD55_APP_CMD 55 /* APP_CMD, the following will a ACMD */
  98. #define OCR_INDEX 0x00FF8000
  99. /*----------------------------------------------------------------------------*
  100. Card status defines
  101. *----------------------------------------------------------------------------*/
  102. #define CARD_STATUS_ACMD_ENABLE (1 << 5)
  103. #define CARD_STATUS_RDY_DATA (1 << 8)
  104. #define CARD_STATUS_CURRENT_STATE (0x0F << 9)
  105. #define CARD_STATUS_ERASE_RESET (1 << 13)
  106. #define MCI_SLOW_RATE 1
  107. #define MCI_NORMAL_RATE 2
  108. #define SD_1_BIT 0
  109. #define SD_4_BIT 1
  110. #define CARD_UNKNOWN 0
  111. #define MMC_CARD 1
  112. #define SD_CARD 2
  113. #define PCLK 48000000
  114. #define SDCLK_SLOW 400000
  115. #define SDCLK_NORMAL 10000000
  116. /* MCI clk freq = PCLK/(2* (Clkdiv +1) -> LPC manual sais: MCI clk freq = MCLK(2*(ClkDiv+1) !*/
  117. #define MCLKDIV_SLOW ((PCLK / SDCLK_SLOW) / 2 - 1)
  118. #define MCLKDIV_NORMAL ((PCLK / SDCLK_NORMAL) / 2 - 1)
  119. #define DATA_TIMER_VALUE_R ((PCLK / (2 * (MCLKDIV_NORMAL + 1))) / 4) // 250ms
  120. #define DATA_TIMER_VALUE_W (PCLK / (2 * (MCLKDIV_NORMAL + 1))) // 1000ms
  121. #define EXPECT_NO_RESP 0
  122. #define EXPECT_SHORT_RESP 1
  123. #define EXPECT_LONG_RESP 2
  124. #define MCI_OUTPUT_MODE_PUSHPULL (0)
  125. #define MCI_OUTPUT_MODE_OPENDRAIN (1)
  126. #define NOT_ALLOW_CMD_TIMER 0
  127. #define ALLOW_CMD_TIMER 1
  128. #define MCI_DISABLE_CMD_TIMER (1<<8)
  129. /*
  130. * For the SD card I tested, the minimum block length is 512
  131. * For MMC, the restriction is loose, due to the variety of SD and MMC
  132. * card support, ideally, the driver should read CSD register to find the
  133. * speed and block length for the card, and set them accordingly.
  134. *
  135. * In this driver example, it will support both MMC and SD cards, it
  136. * does read the information by send SEND_CSD to poll the card status,
  137. * but, it doesn't configure them accordingly. this is not intended to
  138. * support all the SD and MMC card.
  139. *
  140. */
  141. /*
  142. DATA_BLOCK_LEN table
  143. DATA_BLOCK_LEN Actual Size( BLOCK_LENGTH )
  144. 11 2048
  145. 10 1024
  146. 9 512
  147. 8 256
  148. 7 128
  149. 6 64
  150. 5 32
  151. 4 16
  152. 3 8
  153. 2 4
  154. 1 2
  155. */
  156. /* This is the size of the buffer of origin data */
  157. #define MCI_DMA_SIZE (1000UL)
  158. /* This is the area original data is stored or data to be written to the SD/MMC card. */
  159. #define MCI_DMA_SRC_ADDR LPC_PERI_RAM_BASE
  160. /* This is the area, after reading from the SD/MMC*/
  161. #define MCI_DMA_DST_ADDR (MCI_DMA_SRC_ADDR + MCI_DMA_SIZE)
  162. /* SD-HC uses byte addressing, SD-normal uses block addressing */
  163. #define MMC_BLOCK_MODE 0
  164. #define MMC_BYTE_MODE 1 /* acces card using byte-addresses iso sector addresses */
  165. /* To simplify the programming, please note that, BLOCK_LENGTH is a multiple of FIFO_SIZE */
  166. #define DATA_BLOCK_LEN 9 /* Block size field in DATA_CTRL */
  167. #define BLOCK_LENGTH (1 << DATA_BLOCK_LEN)
  168. /* for SD card, 128, the size of the flash */
  169. /* card is 512 * 128 = 64K */
  170. #define BLOCK_NUM 0x80
  171. #define FIFO_SIZE 16
  172. #define BUS_WIDTH_1BIT 0
  173. #define BUS_WIDTH_4BITS 10
  174. /* MCI Status register bit information */
  175. #define MCI_CMD_CRC_FAIL (1 << 0)
  176. #define MCI_DATA_CRC_FAIL (1 << 1)
  177. #define MCI_CMD_TIMEOUT (1 << 2)
  178. #define MCI_DATA_TIMEOUT (1 << 3)
  179. #define MCI_TX_UNDERRUN (1 << 4)
  180. #define MCI_RX_OVERRUN (1 << 5)
  181. #define MCI_CMD_RESP_END (1 << 6)
  182. #define MCI_CMD_SENT (1 << 7)
  183. #define MCI_DATA_END (1 << 8)
  184. #define MCI_START_BIT_ERR (1 << 9)
  185. #define MCI_DATA_BLK_END (1 << 10)
  186. #define MCI_CMD_ACTIVE (1 << 11)
  187. #define MCI_TX_ACTIVE (1 << 12)
  188. #define MCI_RX_ACTIVE (1 << 13)
  189. #define MCI_TX_HALF_EMPTY (1 << 14)
  190. #define MCI_RX_HALF_FULL (1 << 15)
  191. #define MCI_TX_FIFO_FULL (1 << 16)
  192. #define MCI_RX_FIFO_FULL (1 << 17)
  193. #define MCI_TX_FIFO_EMPTY (1 << 18)
  194. #define MCI_RX_FIFO_EMPTY (1 << 19)
  195. #define MCI_TX_DATA_AVAIL (1 << 20)
  196. #define MCI_RX_DATA_AVAIL (1 << 21)
  197. /*----------------------------------------------------------------------------*
  198. MCI Data control register definitions
  199. *----------------------------------------------------------------------------*/
  200. /* Data transfer enable */
  201. #define MCI_DATACTRL_ENABLE_POS (0)
  202. #define MCI_DATACTRL_ENABLE_MASK (0x01)
  203. #define MCI_DATACTRL_ENABLE (1 << MCI_DATACTRL_ENABLE_POS)
  204. #define MCI_DATACTRL_DISABLE (0 << MCI_DATACTRL_ENABLE_POS)
  205. /* Data transfer direction */
  206. #define MCI_DATACTRL_DIR_POS (1)
  207. #define MCI_DATACTRL_DIR_MASK (0x01)
  208. #define MCI_DATACTRL_DIR_FROM_CARD (1 << MCI_DATACTRL_DIR_POS)
  209. #define MCI_DATACTRL_DIR_TO_CARD (0 << MCI_DATACTRL_DIR_POS)
  210. /* Data transfer mode */
  211. #define MCI_DATACTRL_XFER_MODE_POS (2)
  212. #define MCI_DATACTRL_XFER_MODE_MASK (0x01)
  213. #define MCI_DATACTRL_XFER_MODE_STREAM (1 << MCI_DATACTRL_XFER_MODE_POS)
  214. #define MCI_DATACTRL_XFER_MODE_BLOCK (0 << MCI_DATACTRL_XFER_MODE_POS)
  215. /* Enable DMA */
  216. #define MCI_DATACTRL_DMA_ENABLE_POS (3)
  217. #define MCI_DATACTRL_DMA_ENABLE_MASK (0x01)
  218. #define MCI_DATACTRL_DMA_ENABLE (1 << MCI_DATACTRL_DMA_ENABLE_POS)
  219. #define MCI_DATACTRL_DMA_DISABLE (0 << MCI_DATACTRL_DMA_ENABLE_POS)
  220. /** Data block length macro */
  221. #define MCI_DTATCTRL_BLOCKSIZE(n) _SBF(4, (n & 0xF))
  222. #define CMD_INT_MASK (MCI_CMD_CRC_FAIL | MCI_CMD_TIMEOUT | MCI_CMD_RESP_END | \
  223. MCI_CMD_SENT | MCI_CMD_ACTIVE)
  224. #define DATA_ERR_INT_MASK (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_TX_UNDERRUN | \
  225. MCI_RX_OVERRUN | MCI_START_BIT_ERR)
  226. #define ACTIVE_INT_MASK (MCI_TX_ACTIVE | MCI_RX_ACTIVE)
  227. #define FIFO_INT_MASK (MCI_TX_HALF_EMPTY | MCI_RX_HALF_FULL | \
  228. MCI_TX_FIFO_FULL | MCI_RX_FIFO_FULL | \
  229. MCI_TX_FIFO_EMPTY | MCI_RX_FIFO_EMPTY | \
  230. MCI_DATA_BLK_END )
  231. #define FIFO_TX_INT_MASK (MCI_TX_HALF_EMPTY)
  232. #define FIFO_RX_INT_MASK (MCI_RX_HALF_FULL )
  233. #define DATA_END_INT_MASK (MCI_DATA_END | MCI_DATA_BLK_END)
  234. #define ERR_TX_INT_MASK (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_TX_UNDERRUN | MCI_START_BIT_ERR)
  235. #define ERR_RX_INT_MASK (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_START_BIT_ERR)
  236. /* Error code on the command response. */
  237. #define INVALID_RESPONSE 0xFFFFFFFF
  238. /*----------------------------------------------------------------------------*
  239. MCI_Public_Types MCI Public Types
  240. *----------------------------------------------------------------------------*/
  241. typedef enum mci_card_state
  242. {
  243. MCI_CARDSTATE_IDLE = 0,
  244. MCI_CARDSTATE_READY,
  245. MCI_CARDSTATE_IDENDTIFIED,
  246. MCI_CARDSTATE_STBY,
  247. MCI_CARDSTATE_TRAN,
  248. MCI_CARDSTATE_DATA,
  249. MCI_CARDSTATE_RCV,
  250. MCI_CARDSTATE_PRG,
  251. MCI_CARDSTATE_DIS,
  252. } en_Mci_CardState;
  253. typedef enum mci_func_error
  254. {
  255. MCI_FUNC_OK = 0,
  256. MCI_FUNC_FAILED = -1,
  257. MCI_FUNC_BAD_PARAMETERS = -2,
  258. MCI_FUNC_BUS_NOT_IDLE = -3,
  259. MCI_FUNC_TIMEOUT = -3,
  260. MCI_FUNC_ERR_STATE = -4,
  261. MCI_FUNC_NOT_READY = -5,
  262. } en_Mci_Func_Error;
  263. typedef enum mci_card_type
  264. {
  265. MCI_SDHC_SDXC_CARD = 3,
  266. MCI_SDSC_V2_CARD = 2,
  267. MCI_MMC_CARD = 1,
  268. MCI_SDSC_V1_CARD = 0,
  269. MCI_CARD_UNKNOWN = -1,
  270. } en_Mci_CardType;
  271. /*!
  272. * \brief Multimedia card identification register.
  273. */
  274. typedef struct mci_cid
  275. {
  276. /* Manufacturer ID */
  277. uint8_t MID;
  278. /* OEM/Application ID */
  279. uint16_t OID;
  280. /* Product name 8-bits higher */
  281. uint8_t PNM_H;
  282. /* Product name 32-bits Lower */
  283. uint32_t PNM_L;
  284. /* Product revision */
  285. uint8_t PRV;
  286. /* Product serial number */
  287. uint32_t PSN;
  288. /* reserved: 4 bit */
  289. uint8_t reserved;
  290. /* Manufacturing date: 12 bit */
  291. uint16_t MDT;
  292. /* CRC7 checksum: 7 bit */
  293. uint8_t CRC;
  294. /* not used, always: 1 bit always 1 */
  295. uint8_t unused;
  296. } st_Mci_CardId;
  297. /** @defgroup MCI_Public_Functions MCI Public Functions
  298. * @{
  299. */
  300. int32_t Lpc177x_8x_MciInit(uint8_t powerActiveLevel);
  301. void Lpc177x_8x_MciSendCmd(uint32_t CmdIndex, uint32_t Argument, uint32_t ExpectResp, uint32_t AllowTimeout);
  302. int32_t Lpc177x_8x_MciGetCmdResp(uint32_t CmdIndex, uint32_t NeedRespFlag, uint32_t *CmdRespStatus);
  303. int32_t Lpc177x_8x_MciCmdResp(uint32_t CmdIndex, uint32_t Argument, uint32_t ExpectResp, uint32_t *CmdResp, uint32_t AllowTimeout);
  304. void Lpc177x_8x_MciSetClock(uint32_t clockrate);
  305. int32_t Lpc177x_8x_MciSetBusWidth(uint32_t width);
  306. int32_t Lpc177x_8x_MciAcmd_SendOpCond(uint8_t hcsVal);
  307. int32_t Lpc177x_8x_MciCardInit(void);
  308. en_Mci_CardType Lpc177x_8x_MciGetCardType(void);
  309. int32_t Lpc177x_8x_MciCardReset(void);
  310. int32_t Lpc177x_8x_MciCmd_SendIfCond(void);
  311. int32_t Lpc177x_8x_MciGetCID(st_Mci_CardId* cidValue);
  312. int32_t Lpc177x_8x_MciSetCardAddress(void);
  313. uint32_t Lpc177x_8x_MciGetCardAddress(void);
  314. int32_t Lpc177x_8x_MciGetCSD(uint32_t* csdVal);
  315. int32_t Lpc177x_8x_MciCmd_SelectCard(void);
  316. int32_t Lpc177x_8x_MciGetCardStatus(int32_t* cardStatus);
  317. uint32_t Lpc177x_8x_MciGetDataXferEndState(void);
  318. uint32_t Lpc177x_8x_MciGetXferErrState(void);
  319. int32_t Lpc177x_8x_MciSetBlockLen(uint32_t blockLength);
  320. int32_t Lpc177x_8x_MciAcmd_SendBusWidth(uint32_t buswidth);
  321. int32_t Lpc177x_8x_MciCmd_StopTransmission(void);
  322. int32_t Lpc177x_8x_MciCmd_WriteBlock(uint32_t blockNum, uint32_t numOfBlock);
  323. int32_t Lpc177x_8x_MciCmd_ReadBlock(uint32_t blockNum, uint32_t numOfBlock);
  324. int32_t Lpc177x_8x_MciWriteBlock(uint8_t* memblock, uint32_t blockNum, uint32_t numOfBlock);
  325. int32_t Lpc177x_8x_MciReadBlock(uint8_t* destBlock, uint32_t blockNum, uint32_t numOfBlock);
  326. int Lpc177x_8x_MciIrqGetPriority(void);
  327. void Lpc177x_8x_MciIrqSetPriority(int);
  328. #if MCI_DMA_ENABLED
  329. void Lpc177x_8x_MciDMA_IRQHandler (void);
  330. #endif
  331. #endif /* end _LPC177X_8X_MCI_H_ */