stm32_can.h 4.0 KB

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  1. #ifndef _STM32_CAN_H_
  2. #define _STM32_CAN_H_
  3. /*
  4. * Copyright (C) 2010 by Ulrich Prinz (uprinz2@netscape.net)
  5. * Copyright (C) 2010 by Rittal GmbH & Co. KG. All rights reserved.
  6. * Copyright (C) 2012 by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de).
  7. *
  8. * All rights reserved.
  9. *
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. *
  14. * 1. Redistributions of source code must retain the above copyright
  15. * notice, this list of conditions and the following disclaimer.
  16. * 2. Redistributions in binary form must reproduce the above copyright
  17. * notice, this list of conditions and the following disclaimer in the
  18. * documentation and/or other materials provided with the distribution.
  19. * 3. Neither the name of the copyright holders nor the names of
  20. * contributors may be used to endorse or promote products derived
  21. * from this software without specific prior written permission.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  24. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  25. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  26. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  27. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  28. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  29. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  30. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  31. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  33. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  34. * SUCH DAMAGE.
  35. *
  36. * For additional information see http://www.ethernut.de/
  37. */
  38. /*!
  39. * \struct _CANFRAME canbus.h
  40. * \brief CAN frame structure
  41. */
  42. struct _CANBUFFER {
  43. CAN_FIFOMailBox_TypeDef *dataptr; //<physical memory address where the buffer is stored, may be device specific
  44. uint8_t size; // the allocated size of the buffer
  45. uint8_t datalength; // the length of the data currently in the buffer
  46. uint8_t dataindex; // the index into the buffer where the data starts
  47. };
  48. /*!
  49. * \struct _CANINFO canbus.h
  50. * \brief CAN controller information structure.
  51. * This is installed in heap at initializaton
  52. * of a bus.
  53. *
  54. * We need a counter for every interrupt, or otherwise
  55. * we need to use atomic increment
  56. */
  57. struct _CANBUSINFO {
  58. HANDLE volatile can_rx_rdy; /*!< Receiver event queue. */
  59. HANDLE volatile can_tx_rdy; /*!< Transmitter event queue. */
  60. uint32_t can_rx_frames; /*!< Number of packets received. */
  61. uint32_t can_tx_frames; /*!< Number of packets sent. */
  62. uint32_t can_rx_interrupts; /*!< Number of interrupts. */
  63. uint32_t can_tx_interrupts; /*!< Number of interrupts. */
  64. uint32_t can_sce_interrupts; /*!< Number of interrupts. */
  65. uint32_t can_overruns; /*!< Number of packet overruns. */
  66. uint32_t can_errors; /*!< Number of frame errors. */
  67. uint32_t can_rx_timeout; /*!< Receive timeout to wait when no frame available */
  68. uint32_t can_tx_timeout; /*!< Transmit timeout to wait when slot gets available */
  69. CANBUFFER can_RxBuf; /*!< Buffer for RX queue. */
  70. };
  71. struct _NUTCANBUS {
  72. uptr_t bus_base; /*< Periphery Base Register Address */
  73. __IO uint32_t* bb_base; /*< Periphery BIT BAND Base Register Address */
  74. IRQ_HANDLER *sig_rx_irq; /*< IRQ Handler RX Interrupt */
  75. IRQ_HANDLER *sig_tx_irq; /*< IRQ Handler TX Interrupt */
  76. IRQ_HANDLER *sig_sce_irq; /*< IRQ Handler SCE Interrupt */
  77. struct _CANBUSINFO *bus_ci; /*< CANINFO for the BUS */
  78. int (*bus_inithw)(void); /*< Function for low level hardware initialization */
  79. };
  80. extern NUTCANBUS Stm32CanBus1;
  81. extern NUTCANBUS Stm32CanBus1C;
  82. extern NUTCANBUS Stm32CanBus2;
  83. extern NUTCANBUS Stm32CanBus2C;
  84. #endif