irqreg_mcf5.h 3.1 KB

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  1. /*
  2. * Copyright 2012 by Embedded Technologies s.r.o
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the copyright holders nor the names of
  14. * contributors may be used to endorse or promote products derived
  15. * from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  20. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  21. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  25. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  27. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28. * SUCH DAMAGE.
  29. *
  30. * For additional information see http://www.ethernut.de/
  31. */
  32. #ifndef _DEV_IRQREG_H_
  33. #error "Do not include this file directly. Use dev/irqreg.h instead!"
  34. #endif
  35. #if defined(MCU_MCF5225X)
  36. #include <arch/m68k/coldfire/mcf5225x/irqreg_mcf5225x.h>
  37. #elif defined(MCU_MCF51CN)
  38. #include <arch/m68k/coldfire/mcf51cn/irqreg_mcf51cn.h>
  39. #else
  40. #warning "Unknown Coldfire MCU Family defined"
  41. #endif
  42. /*
  43. * MCF52259RM.pdf - 16.3.2 Interrupt Mask Registers (IMRHn, IMRLn)
  44. *
  45. * NOTE
  46. *
  47. * A spurious interrupt may occur if an interrupt source is being masked in the
  48. * interrupt controller mask register (IMR) or a module’s interrupt mask
  49. * register while the interrupt mask in the status register (SR[I]) is set to a value
  50. * lower than the interrupt’s level. This is because by the time the status
  51. * register acknowledges this interrupt, the interrupt has been masked. A
  52. * spurious interrupt is generated because the CPU cannot determine the
  53. * interrupt source.
  54. * To avoid this situation for interrupts sources with levels 1–6, first write a
  55. * higher level interrupt mask to the status register, before setting the mask in
  56. * the IMR or the module’s interrupt mask register. After the mask is set, return
  57. * the interrupt mask in the status register to its previous value. Because level
  58. * 7 interrupts cannot be disabled in the status register prior to masking, use of
  59. * the IMR or module interrupt mask registers to disable level 7 interrupts is
  60. * not recommended.
  61. */
  62. #define PREVENT_SPURIOUS_INTERRUPT(code) {NutEnterCritical();{code;} NutExitCritical();}