ih_spi0.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151
  1. /*!
  2. * Copyright (C) 2001-2010 by egnite Software GmbH
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*
  35. * $Log: ih_spi0.c,v $
  36. *
  37. */
  38. #include <arch/avr32.h>
  39. #include <dev/irqreg.h>
  40. #include <avr32/io.h>
  41. #include <arch/avr32/ihndlr.h>
  42. #ifndef NUT_IRQPRI_SPI0
  43. #define NUT_IRQPRI_SPI0 AVR32_INTC_INT3
  44. #endif
  45. #ifndef AVR32_SPI0
  46. #define AVR32_SPI0 AVR32_SPI
  47. #endif
  48. #ifndef AVR32_SPI0_IRQ
  49. #define AVR32_SPI0_IRQ AVR32_SPI_IRQ
  50. #endif
  51. static int SerialPeripheral0IrqCtl(int cmd, void *param);
  52. IRQ_HANDLER sig_SPI0 = {
  53. #ifdef NUT_PERFMON
  54. 0, /* Interrupt counter, ir_count. */
  55. #endif
  56. NULL, /* Passed argument, ir_arg. */
  57. NULL, /* Handler subroutine, ir_handler. */
  58. SerialPeripheral0IrqCtl /* Interrupt control, ir_ctl. */
  59. };
  60. /*!
  61. * \brief Serial peripheral interface 0 interrupt entry.
  62. */
  63. static SIGNAL(SerialPeripheral0IrqEntry)
  64. {
  65. IRQ_ENTRY();
  66. #ifdef NUT_PERFMON
  67. sig_SPI0.ir_count++;
  68. #endif
  69. if (sig_SPI0.ir_handler) {
  70. (sig_SPI0.ir_handler) (sig_SPI0.ir_arg);
  71. }
  72. IRQ_EXIT();
  73. }
  74. /*!
  75. * \brief Serial peripheral interface 0 interrupt control.
  76. *
  77. * \param cmd Control command.
  78. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  79. * - NUT_IRQCTL_STATUS Query interrupt status.
  80. * - NUT_IRQCTL_ENABLE Enable interrupt.
  81. * - NUT_IRQCTL_DISABLE Disable interrupt.
  82. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  83. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  84. * \param param Pointer to optional parameter.
  85. *
  86. * \return 0 on success, -1 otherwise.
  87. */
  88. static int SerialPeripheral0IrqCtl(int cmd, void *param)
  89. {
  90. int rc = 0;
  91. unsigned int *ival = (unsigned int *) param;
  92. ureg_t imr = AVR32_SPI0.imr;
  93. static ureg_t enabledIMR = 0;
  94. int_fast8_t enabled = imr;
  95. /* Disable interrupt. */
  96. if (enabled) {
  97. AVR32_SPI0.idr = 0xFFFFFFFF;
  98. AVR32_SPI0.idr;
  99. enabledIMR = imr;
  100. }
  101. switch (cmd) {
  102. case NUT_IRQCTL_INIT:
  103. /* Set the vector. */
  104. register_interrupt(SerialPeripheral0IrqEntry, AVR32_SPI0_IRQ, NUT_IRQPRI_SPI0);
  105. break;
  106. case NUT_IRQCTL_STATUS:
  107. if (enabled) {
  108. *ival |= 1;
  109. } else {
  110. *ival &= ~1;
  111. }
  112. break;
  113. case NUT_IRQCTL_ENABLE:
  114. enabled = 1;
  115. break;
  116. case NUT_IRQCTL_DISABLE:
  117. enabled = 0;
  118. break;
  119. case NUT_IRQCTL_GETPRIO:
  120. *ival = AVR32_INTC_INT3;
  121. break;
  122. #ifdef NUT_PERFMON
  123. case NUT_IRQCTL_GETCOUNT:
  124. *ival = (unsigned int) sig_SPI0.ir_count;
  125. sig_SPI0.ir_count = 0;
  126. break;
  127. #endif
  128. default:
  129. rc = -1;
  130. break;
  131. }
  132. /* Enable interrupt. */
  133. if (enabled) {
  134. AVR32_SPI0.ier = enabledIMR;
  135. }
  136. return rc;
  137. }