cortex_irqctl.c 4.6 KB

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  1. /*
  2. * Copyright (C) 2013 by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de)
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. Neither the name of the copyright holders nor the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  22. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  23. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  25. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  26. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  27. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
  29. * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30. * SUCH DAMAGE.
  31. *
  32. * For additional information see http://www.ethernut.de/
  33. */
  34. /*
  35. * \verbatim
  36. * $Id: cortex_irqctl.c 5654 2014-04-07 14:02:06Z u_bonnes $
  37. *
  38. * Common function to control the interrupt settings of IRQs
  39. * of cortex CPUs. External interrupts with level control still
  40. * need special handling.
  41. * \endverbatim
  42. */
  43. /*!
  44. * \brief CM3 common interrupt control.
  45. *
  46. * \param interrupt Interrupt number.
  47. * \param sig Interrupt control block
  48. * \param cmd Control command.
  49. * - NUT_IRQCTL_INIT Initialize and disable interrupt.
  50. * - NUT_IRQCTL_STATUS Query interrupt status.
  51. * - NUT_IRQCTL_ENABLE Enable interrupt.
  52. * - NUT_IRQCTL_DISABLE Disable interrupt.
  53. * - NUT_IRQCTL_GETMODE Query interrupt mode.
  54. * - NUT_IRQCTL_SETMODE Set interrupt mode (NUT_IRQMODE_LEVEL or NUT_IRQMODE_EDGE).
  55. * Always treated as NUT_IRQMODE_LEVEL.
  56. * - NUT_IRQCTL_GETPRIO Query interrupt priority.
  57. * - NUT_IRQCTL_SETPRIO Set interrupt priority.
  58. * - NUT_IRQCTL_GETCOUNT Query and clear interrupt counter.
  59. * \param param Pointer to optional parameter.
  60. * \param def_priority Priority to use on init
  61. *
  62. * \return 0 on success, -1 otherwise.
  63. */
  64. #include <dev/irqreg.h>
  65. int CM3_IrqCtl(int cmd, void *param, IRQn_Type interrupt,
  66. void (*pfnHandler)(void*),
  67. IRQ_HANDLER* sig, int def_priority)
  68. {
  69. int rc = 0;
  70. unsigned int *ival = (unsigned int *)param;
  71. int enabled;
  72. #if (__CORTEX_M >= 0x03)
  73. enabled = (NVIC->ISER[((uint32_t)(interrupt) >> 5)] ==
  74. (1 << ((uint32_t)(interrupt) & 0x1F)));
  75. #else
  76. enabled = (NVIC->ISER[0] == (1 << ((uint32_t)(interrupt) & 0x1F)));
  77. #endif
  78. /* Disable interrupt. */
  79. if (enabled) {
  80. NVIC_DisableIRQ(interrupt);
  81. }
  82. switch(cmd) {
  83. case NUT_IRQCTL_INIT:
  84. /* Set the vector. */
  85. Cortex_RegisterInt(interrupt, pfnHandler);
  86. /* Initialize with defined priority. */
  87. NVIC_SetPriority(interrupt, def_priority);
  88. /* Clear interrupt */
  89. NVIC_ClearPendingIRQ(interrupt);
  90. break;
  91. case NUT_IRQCTL_STATUS:
  92. if (enabled) {
  93. *ival |= 1;
  94. }
  95. else {
  96. *ival &= ~1;
  97. }
  98. break;
  99. case NUT_IRQCTL_ENABLE:
  100. enabled = 1;
  101. break;
  102. case NUT_IRQCTL_DISABLE:
  103. enabled = 0;
  104. break;
  105. case NUT_IRQCTL_GETMODE:
  106. *ival = NUT_IRQMODE_LEVEL;
  107. break;
  108. case NUT_IRQCTL_SETMODE:
  109. break;
  110. case NUT_IRQCTL_GETPRIO:
  111. *ival = NVIC_GetPriority(interrupt);
  112. break;
  113. case NUT_IRQCTL_SETPRIO:
  114. NVIC_SetPriority(interrupt, *ival);
  115. break;
  116. #ifdef NUT_PERFMON
  117. case NUT_IRQCTL_GETCOUNT:
  118. *ival = (unsigned int)sig->ir_count;
  119. sig->ir_count = 0;
  120. break;
  121. #endif
  122. default:
  123. rc = -1;
  124. break;
  125. }
  126. /* Enable interrupt. */
  127. if (enabled) {
  128. NVIC_EnableIRQ(interrupt);
  129. }
  130. return rc;
  131. }